NXP Semiconductors

35FS4500, 35FS6500

Grade 0 safety power system basis chip with CAN flexible data transceiver

35FS4500-35FS6500SDS

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Short data sheet: advance information

Rev. 1.0 — 15 December 2017

9 / 19

Pin

Symbol

Type

Definition

26

MOSI

D_IN

SPI bus. Master output slave input

27

SCLK

D_IN

SPI Bus. Serial clock

28

NCS

D_IN

Not chip select (active low)

29

INTB

D_OUT

This output pin generates a low pulse when an Interrupt condition occurs.

Pulse duration is configurable. Internal pull-up to VDDIO.

30

VDDIO

A_IN

Input voltage for MISO output buffer

Allows voltage compatibility with MCU I/Os

31

SELECT

D_IN

Hardware selection pin for VAUX and VCCA output voltages

32

FB_CORE

A_IN

VCORE voltage feedback. Input of the error amplifier.

33

COMP_CORE

A_OUT

Compensation network. Output of the error amplifier.

For FS4500 series, this pin must be left open (NC).

34

VCORE_SNS

A_IN

VCORE input voltage sense

SW_CORE

A_OUT

VCORE output switching point for FS6500 series

35

or VCORE

A_OUT

VCORE output voltage for FS4500 series

36

BOOT_CORE

A_IN/OUT

Bootstrap capacitor for VCORE internal NMOS gate drive.

For FS4500 series, this pin must be left open (NC).

37

VPRE

A_IN

VPRE input voltage sense

38

VAUX

A_OUT

VAUX output voltage. External PNP ballast transistor. Collector connection

39

VAUX_B

A_OUT

VAUX voltage regulator. External PNP ballast transistor. Base connection

40

VAUX_E

A_OUT

VAUX voltage regulator. External PNP ballast transistor. Emitter connection

41

VCCA_E

A_OUT

VCCA voltage regulator. External PNP ballast transistor. Emitter connection

42

VCCA_B

A_OUT

VCCA voltage regulator. External PNP ballast transistor. Base connection

43

VCCA

A_OUT

VCCA output voltage. External PNP ballast transistor. Collector connection

44

GATE_LS

A_OUT

Low-side MOSFET gate drive for non-inverting buck-boost configuration

45

DGND

GROUND

Digital ground connection

46

BOOT_PRE

A_IN/OUT

Bootstrap capacitor for the VPRE internal NMOS gate drive

47

SW_PRE2

A_OUT

Second pre-regulator output switching point

48

SW_PRE1

A_OUT

First pre-regulator output switching point