| Electronic Components Datasheet Search |
|
TMUX7308FRRPR Datasheet(PDF) 3 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
TMUX7308FRRPR Datasheet(HTML) 3 Page - Texas Instruments |
|
3 / 54 page ![]() 5 Device Comparison Table PRODUCT DESCRIPTION TMUX7308F +60 V/ –60 V Tolerant, Fault-protected, Latch-up Immune, Single-Ended 8:1 Multiplexer TMUX7309F +60 V/ –60 V Tolerant, Fault-protected, Latch-up Immune, 4:1, 2-Channel Multiplexer 6 Pin Configuration and Functions 1 A0 16 A1 2 EN 15 A2 3 VSS 14 GND 4 S1 13 VDD 5 S2 12 S5 6 S3 11 S6 7 S4 10 S7 8 D 9 S8 Not to scale Figure 6-1. PW Package 16-Pin TSSOP, Top View 1 VSS 12 GND 2 S1 11 VDD 3 S2 10 S5 4 S3 9 S6 Not to scale Thermal Pad Figure 6-2. RRP Package 16-Pin WQFN, Top View Table 6-1. Pin Functions: TMUX7308F PIN TYPE(1) DESCRIPTION NAME TSSOP WQFN A0 1 15 I Logic control input address 0 (A0), has internal 4 MΩ pull-down resistor. Controls switch state as shown in Section 9.4.3. EN 2 16 I Active high logic enable (EN) pin, has internal 4 MΩ pull-down resistor. The device is disabled and all switches become high impedance when the pin is low. When the pin is high, the Ax logic inputs determine individual switch states as shown in Section 9.4.3. VSS 3 1 P Negative power supply. This pin is the most negative power-supply potential. In single-supply applications, this pin can be connected to ground. For reliable operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VSS and GND. S1 4 2 I/O Overvoltage protected source pin 1. Can be an input or output. S2 5 3 I/O Overvoltage protected source pin 2. Can be an input or output. S3 6 4 I/O Overvoltage protected source pin 3. Can be an input or output. S4 7 5 I/O Overvoltage protected source pin 4. Can be an input or output. D 8 6 I/O Drain pin. Can be an input or output. The drain pin is not overvoltage protected. S8 9 7 I/O Overvoltage protected source pin 8. Can be an input or output. S7 10 8 I/O Overvoltage protected source pin 7. Can be an input or output. S6 11 9 I/O Overvoltage protected source pin 6. Can be an input or output. S5 12 10 I/O Overvoltage protected source pin 5. Can be an input or output. VDD 13 11 P Positive power supply. This pin is the most positive power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VDD and GND. GND 14 12 P Ground (0 V) reference A2 15 13 I Logic control input address 2 (A2), has internal 4 MΩ pull-down resistor. Controls switch state as shown in Section 9.4.3. A1 16 14 I Logic control input address 1 (A1), has internal 4 MΩ pull-down resistor. Controls switch state as shown in Section 9.4.3. Thermal Pad P The thermal pad is not connected internally. It is recommended that the pad be tied to GND or VSS for best performance. (1) I = input, O = output, I/O = input and output, P = power www.ti.com TMUX7308F, TMUX7309F SCDS403B – FEBRUARY 2021 – REVISED DECEMBER 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: TMUX7308F TMUX7309F |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |