AFE7906 6-Channel, 5-MHz to 12-GHz RF Sampling Receiver with 3-GSPS ADCs

1 Features

• Six RF sampling 14 bit, 3 GSPS ADCs

• Maximum RF signal bandwidth:

– 4 ADCs: 1200 MHz per ADC

– 6 ADCs: 600 MHz per ADC

• RF frequency range: 5 MHz - 12 GHz

• Digital step attenuators (DSA): 25 dB range, 0.5-

dB steps

• Single DDC (on 6 channels) or dual-band DDCs

(on 4 channels)

• 16x NCOs per DDC channel

• Optional Internal PLL/VCO for ADC clocks or

external clock at ADC sample rate

• Sysref alignment detector

• SerDes data interface:

– JESD204B and JESD204C compatible

– 8 SerDes transmitters up to 29.5 Gbps

– Subclass 1 multi-device synchronization

• Package: 17-mm × 17-mm FCBGA, 0.8-mm pitch

2 Applications

• Radar

• Seeker front end

• Defense radio

• Wireless communications test

3 Description

The AFE7906 is a high performance, wide bandwidth

multi-channel receiver, integrating six RF Sampling

ADCs. With operation up to 12 GHz, this device

enables direct RF sampling in the L, S, C and X-

band frequency ranges without the need for additional

frequency conversions stages. This improvement in

density and flexibility enables high-channel-count,

multi-mission systems.

Each receiver chain includes a 25-dB range DSA

(Digital Step Attenuator), followed by a 3-GSPS ADC

(analog-to-digital converter). Four receiver channels

have an analog peak power detector and various

digital power detectors to assist an external or

internal autonomous automatic gain controller, and

RF overload detectors for device reliability protection.

Flexible decimation options provide optimization of

data bandwidth up to 1200 MHz for four RX or 600

MHz.

The device contains a SYSREF timing detector to

allow optimization of the SYSREF input timing relative

to the device clock.

Device Information

PART NUMBER

PACKAGE(1)

BODY SIZE

AFE7906

FC-BGA

17.00 mm × 17.00 mm

(1)

For all available packages, see the orderable addendum at

the end of the data sheet.

spacer

Buffer

SHA

ADC

Buffer

SHA

ADC

Buffer

SHA

ADC

Buffer

SHA

ADC

CLKIN+/-

SYSREF+/-

PLL

/2,3,4,6

RX

DDC

RX

DDC

RX

DDC

RX

DDC

1RX+/-

2RX+/-

4RX+/-

3RX+/-

1STX+/-

8STX+/-

2STX+/-

3STX+/-

4STX+/-

5STX+/-

6STX+/-

7STX+/-

Buffer

SHA

ADC

1FB+/-

Buffer

SHA

ADC

FB

DDC

2FB+/-

FB

DDC

DSA

DSA

DSA

DSA

DSA

DSA

Functional Block Diagram

AFE7906

SBASAF7 – JANUARY 2022

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.