STM32WB10CC datasheet(2/110 Pages) STMICROELECTRONICS

2 / 110 page

STM32WB10CC

2/110

DS13259 Rev 2

 Rich analog peripherals (down to 2.0 V)

– 12-bit ADC 2.5 Msps, 190 µA/Msps

 System peripherals

– Inter processor communication controller

(IPCC) for communication with Bluetooth®

Low Energy

– HW semaphores for resources sharing

between CPUs

– 1x DMA controller (7x channels) supporting

ADC, SPI, I2C, USART, AES, timers

– 1x USART (ISO 7816, IrDA, SPI Master,

Modbus and Smartcard mode)

– 1x SPI 32 Mbit/s

– 1x I2C (SMBus/PMBus)

– Touch sensing controller, up to eight

sensors

– 1x 16-bit, four channels advanced timer

– 1x 32-bit, four channels timer

– 2x 16-bit ultra-low-power timer

– 1x independent Systick

– 1x independent watchdog

– 1x window watchdog

 Security and ID

– Secure firmware installation (SFI) for

Bluetooth® Low Energy SW stack

– 2x hardware encryption AES maximum

256-bit for the application and the

Bluetooth® Low Energy

– HW public key authority (PKA)

– Cryptographic algorithms: RSA,



Diffie-Helman, ECC over GF(p)

– True random number generator (RNG)

– Sector protection against R/W operation

(PCROP)

– CRC calculation unit

– Die information: 96-bit unique ID

– IEEE 64-bit unique ID. Possibility to derive

Bluetooth® Low Energy 48-bit EUI

 Up to 30 fast I/Os, 28 of them 5 V-tolerant

 Development support

– Serial wire debug (SWD), JTAG for the

application processor

– Application cross trigger

 Package is ECOPACK2 compliant

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