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MAXQ1065 Datasheet(PDF) 4 Page - Maxim Integrated Products |
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MAXQ1065 Datasheet(HTML) 4 Page - Maxim Integrated Products |
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4 / 18 page ![]() Electrical Characteristics (continued) (Limits are 100% tested at TA = +25°C and TA = +105°C. Limits over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization. Specifications marked GBD are guaranteed by design and not production tested. Specifications to the minimum operating temperature are guaranteed by design and are not production tested.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Output Low Voltage for All Outputs VOL_IO ISINK = 2mA 0.2 0.4 V Output High Voltage for All Outputs VOH_IO ISOURCE = 2mA VDD - 0.4 V Input Pullup Resistor for All Inputs in Pullup Mode RPU 22 kΩ Input Pulldown Resistor for All Inputs in Pulldown Mode RPD 22 kΩ NONVOLATILE MEMORY Flash Erase Time tP_ERASE Page erase 10 ms Flash Programming Time per Word tPROG 8 μs Flash Endurance NEND 10 kcycles Data Retention tRET TA = +125°C 10 years FUNCTIONAL TIMING Operation Time tOP 1 ms Wake-Up Time tWAKEUP 120 ms DIGITAL I/O: GENERAL Output Voltage High (SPIS_MISO) VOH ISOURCE = 2mA VDD - 0.4 V Output Voltage Low (SPIS_MISO) VOL ISINK = 2mA 0.4 V Input Voltage High (SPIS_SCK, SPIS_SS, SPIS_MOSI) VIH 0.7 x VDD V Input Voltage Low (SPIS_SCK, SPIS_SS, SPIS_MOSI) VIL 0.3 x VDD V Input Leakage Current Low IIL VDD = 3.63V, VIN = 0V -500 +500 nA Input Leakage Current High IIH VDD = 3.63V, VIN = 3.63V -500 +500 nA SPI SLAVE Operating Frequency fSCK 10 MHz Clock Period tSCK 1/fSCK μs Clock Input High Time tSCH (Note 3) tSCK/2 μs Clock Input Low Time tSCL (Note 3) tSCK/2 μs SS Active Setup Time tSSE 10 ns Data Input Setup Time tSIS 5 ns MAXQ1065 Ultra Low-Power Cryptographic Controller with ChipDNATM for Embedded Devices www.maximintegrated.com Maxim Integrated | 4 |
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