SPC584B64E5 datasheet(9/142 Pages) STMICROELECTRONICS

9 / 142 page

DS11701 Rev 4

9/142

SPC584Bx

Description

Figure 1. Block diagram

SPU

DCI

JTAGC

JTAGM

NPC

Nexus Data

Trace

32 ADD

64 DATA

64 Ch

eDMA

AHB_M6

AHB_M4

FLASH

2 MB

EEPROM

4x16 KB

Non Volatile Memory

Multiple RWW partitions

256 Page Line

SWT IAC

Instruction

32 ADD

64 DATA

Load / Store

32 ADD

64 DATA

AHB_S

System Memory Protection Unit

Cross Bar Switch (XBAR) AMBA 2.0 v6 AHB – 64 bit

Periph. Bridge

AIPS_2

E2E ECC

Peripheral

Cluster 2

32 ADD

64 DATA

32 ADD

32 DATA

Periph. Bridge

AIPS_1

E2E ECC

Peripheral

Cluster 1

32 ADD

64 DATA

32 ADD

32 DATA

PRAMC

with E2E

ECC

32 ADD

64 DATA

SRAM

Array 2

128 KB

32 ADD

64 DATA

PFLASHC

Set-Associative

Prefetch Buffers

with E2E ECC

32 ADD

64 DATA

AHB_S

AHB_M

e200 z420n3 – 120 MHz

dual issue

Main Core

Nexus3p

VLE

EFPU2

I-Cache

Control

8 KB

2 way

Unified

Backdoor

Interface

With

E2E ECC

D-MEM

Control

64 KB

D-MEM

Core Memory Protection Unit

(CMPU)

BIU with E2E ECC

Decorated Storage Access

INTC

AHB_M

SBI

(32 to 64)

HSM

32 ADD

32 DATA

32 ADD

64 DATA

D-Cache

Control

4 KB

2 way

32 ADD

64 DATA

Nexus Data

Trace

AHB_M

32 ADD

64 DATA

AHB_M

Nexus Data

Trace

32 ADD

64 DATA

Concentrator_1

E2E ECC

PAMU

32 ADD

64 DATA

AHB_S

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