Bit Read: At the end of a write operation, the master must release the SDA bus line for the proper amount of

setup time (see [[I2C Timing]]) before the next rising edge of SCL during a bit read. The device shifts out each

bit of data on SDA at the falling edge of the previous SCL pulse and the data bit is valid at the rising edge of the

current SCL pulse. Remember that the master generates all SCL clock pulses including when it is reading bits

from the slave.

Acknowledge (ACK and NACK): An acknowledge (ACK) or not acknowledge (NACK) is always the ninth bit

transmitted during a byte transfer. The device receiving data (the master during a read or the slave during a

write operation) performs an ACK by trans- mitting a 0 during the ninth bit. A device performs a NACK by

transmitting a 1 during the ninth bit. Timing for the ACK and NACK is identical to all other bit writes. An ACK is

the acknowledgment that the device is properly receiving data. A NACK is used to terminate a read sequence or

as an indication that the device is not receiving data.

Byte Write: A byte write consists of 8 bits of information transferred from the master to the slave (most significant

bit first) plus a 1-bit acknowledgment from the slave to the master. The 8 bits transmitted by the master are done

according to the bit write definition and the acknowledgment is read using the bit read definition.

Byte Read: A byte read is an 8-bit information transfer from the slave to the master plus a 1-bit ACK or NACK from

the master to the slave. The 8 bits of information that are transferred (most significant bit first) from the slave to the

master are read by the master using the bit read definition, and the master transmits an ACK using the bit write

definition to receive additional data bytes. The master must NACK the last byte read to terminate communication

so the slave returns control of SDA to the master.

START condition. The slave address byte contains the slave address in the most significant 7 bits and the R/W

bit in the least significant bit. The device's slave address is D0h and cannot be modified by the user. When the

R/W bit is 0 (such as in D0h), the master is indicating it writes data to the slave. If R/W = 1 (D1h in this case), the

master is indicating it wants to read from the slave. If an incorrect slave address is written, the device assumes the

is sent.

memory location where the slave is to store the data. The memory address is always the second byte transmitted

during a write operation following the slave address byte.

MAX31343

MEMS Oscillator

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