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MAX32680 Datasheet(PDF) 21 Page - Maxim Integrated Products |
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MAX32680 Datasheet(HTML) 21 Page - Maxim Integrated Products |
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21 / 56 page ![]() Electrical Characteristics—16-/24-Bit Δ-Σ ADC with PGA (continued) (AVDD = +3.3V, REFP - REFN = AVDD, TA = TMIN to TMAX, unless otherwise noted. TA = +25°C for typical specifications, unless otherwise noted. Limits are 100% production tested at TA = +25°C. Limits over the operating temperature range are guaranteed by design and characterization. Specifications marked GBD are guaranteed by design and not production tested.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS PGA Settling Time After changing gain settings to Gain = 1, CFILTER = 0 0.25 ms After changing gain settings to Gain = 1, CFILTER = 100nF 10 After changing gain settings to Gain = 128, CFILTER = 0 2 Input Multiplexer Power- Up Time Settled to 21 bits with 10pF load 2 µs Input Multiplexer Channel-to-Channel Settling Time Settled to 21 bits with 2kΩ external source resistor 2 µs VBIAS Power-Up Time Active generator; settled within 1% of final value; CLOAD = 1µF 10 ms 125K passive generator; settled within 1% of final value; CLOAD = 1µF 575 20K passive generator; settled within 1% of final value; CLOAD = 1µF 90 VBIAS Settling Time Active generator; settled within 1% of final value; CLOAD = 1µF 10 ms 125K passive generator; settled within 1% of final value; CLOAD = 1µF 605 20K passive generator; settled within 1% of final value; CLOAD = 1µF 100 Matched Current Source Startup Time 110 µs Matched Current Source Settling Time 12.5 µs MAX32680 Ultra-Low-Power Arm Cortex-M4F with Precision Analog Front-End and Bluetooth LE 5.2 www.maximintegrated.com Maxim Integrated | 21 |
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