STM32F072VB datasheet(87/128 Pages) STMICROELECTRONICS

87 / 128 page

DS9826 Rev 6

87/128

STM32F072x8 STM32F072xB

Electrical characteristics

Figure 26. ADC accuracy characteristics

Figure 27. Typical connection diagram using the ADC

1. Refer to Table 57: ADC characteristics for the values of RAIN, RADC and CADC.

2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the

pad capacitance (roughly 7 pF). A high Cparasitic value will downgrade conversion accuracy. To remedy

this, fADC should be reduced.

General PCB design guidelines

Power supply decoupling should be performed as shown in Figure 13: Power supply

scheme. The 10 nF capacitor should be ceramic (good quality) and it should be placed as

close as possible to the chip.

2. ADC Accuracy vs. Negative Injection Current: Injecting negative current on any of the standard (non-robust) analog input

pins should be avoided as this significantly reduces the accuracy of the conversion being performed on another analog

input. It is recommended to add a Schottky diode (pin to ground) to standard analog pins which may potentially inject

negative current.

Any positive injection current within the limits specified for IINJ(PIN) and ΣIINJ(PIN) in Section 6.3.14 does not affect the ADC

accuracy.

3. Better performance may be achieved in restricted VDDA, frequency and temperature ranges.

4. Data based on characterization results, not tested in production.

ET = total unajusted error: maximum deviation

between the actual and ideal transfer curves.

EO = offset error: maximum deviation

between the first actual transition and

the first ideal one.

EG = gain error: deviation between the last

ideal transition and the last actual one.

ED = differential linearity error: maximum

deviation between actual steps and the ideal ones.

EL = integral linearity error: maximum deviation

between any actual transition and the end point

correlation line.

(1) Example of an actual transfer curve

(2) The ideal transfer curve

(3) End point correlation line

4095

4094

4093

4093 4094 4095 4096

VDDA

VSSA

1 LSB IDEAL

(1)

(3)

(2)

MS19880V2

MS33900V2

AINx

±1 μA

(1)

Cparasitic

12-bit

converter

CADC

RADC

VDDA

Sample and hold ADC

converter

RAIN

VAIN

(2)

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