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PLF2224 Datasheet(PDF) 1 Page - Infineon Technologies AG |
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PLF2224 Datasheet(HTML) 1 Page - Infineon Technologies AG |
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1 / 2 page  PLB2224 P RODUCT B RIEF Nev er s t op think in g. ■ Advanced Queuing and Scheduling for QoS - IEEE 802.1p Compliant -2 Queues per Port Supporting Strict Priority and Weighted Fair Queue (WFQ) Scheduling Interfaces ■ SMII for Fast Ethernet Ports ■ MII/GMII/TBI for Gigabit Ethernet Ports ■ 32-Bit, 33 MHz PCI or Generic Interface for External CPU ■ I 2C Interface for Configuration EEPROM and Optional CPU Connection. ■ Simple Interface for Status LEDs. Other ■ Power Consumption less than 3 W. ■ 1.8 V, 0.18 µ Logic Process with Embedded DRAM, 3.3 V Tolerant I/Os. Features ■ 24 + 2G Single Chip Switch ■ On-chip Memory for Packet Buffer and Address Tables. No External Memory Required. - 12 Mb of embedded DRAM for Packets, for up to 1,000 Packets - Up to 8K MAC Address Entries with Auto Learning and Aging ■ Supported Switch Configurations - Fixed – Either 24 + 2G, 48 or 48 + 2G - Stack – Up to 7 devices per stack (168 + 2G). Stack controlled using I 2C Interface ■ L2 Switching with L2+ Packet Processing - Generic Pattern Recognition Engine with 16 User Programmable Patterns. Search for Pattern Match within first 64B of packet data. - Can be used to detect Control Packets such as IGMP (IP Multicast) and GVRP (VLAN Membership). - Lookup Results Used to Filter and/or Monitor Packets, Change Forwarding Scope, Modify Queue Assignment, and Collect Statistics. ■ Wire-Speed Performance on All Ports - Fast Ethernet Ports Support 10/100 Mbps - Gigabit Ethernet Ports Support 10/100/1000 Mbps - Half/Full Duplex Support on All Ports at 10/100 Mbps, Full Duplex at 1000 Mbps - Auto-negotiation Support for All Ports - 802.3x compliant Flow Control on Full Duplex Ports, Congestion-based Flow Control on Half Duplex Ports ■ Statistics Counters for SNMP MIB II & RMON1 MIB ■ Port Monitoring Supported Standards ■ Bridging - IEEE 802.1D Compliant with Support for Spanning Tree ■ VLAN - IEEE 802.1Q Compliant - Up to 1K Active VLANs - Port or Tag based ■ Link Aggregation - IEEE 802.3ad Compliant - 2/4/8 FE Ports or 2 GE Ports per Trunk. Multiple Trunks per Device. Support for Resiliency PLB222 4 24 + 2G Sw it c h on a Chip w ith Embed ded M emor y Infineon’s PLB2224 is a highly integrated Layer 2+ switch-on-a-chip with twenty-four 10/100 Mbps and two 10/100/1000 Mbps Ethernet ports. The PLB2224 provides wire-speed, full-duplex switching capability on all ports. On-chip memory for packet buffers and address tables eliminate the need for external memory resulting in smaller PCB real estate and lower power consumption. The PLB2224 features support unmanaged, minimally managed (Smart), and fully managed Layer-2 switch configurations. The Gigabit ports can be used to daisy chain multiple devices in a system providing even higher port counts for medium to large office buildings and multi-tenant, multi-dwelling units where power and space are at a premium. The high level of integra- tion in PLB2224 allows for design of systems with fewer components and a low bill of material. Type Package PLB2224 Plastic BGA-272 |
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