2

4862A–SIGE–09/05

ATR0981 [Preliminary]

2.

Pin Configuration

Figure 2-1.

Pinning PSSO20 with Down Set Paddle

GND4

VS_CTRL

GND5

LNA_OUT

GND4

PA_IN

POUT_CONTROL

GND3

NC

GND6

V2_PA

GND5

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

V3_PA_OUT

V3_PA_OUT

V3_PA_OUT

GND3

GND2

GND1

LNA_IN

BIAS_LNA

Table 2-1.

Pin Description

Pin

Symbol

Function

1

V3_PA_OUT

Matching network for power amplifier output

2

V3_PA_OUT

Inductor to power supply and matching network for power amplifier output

3

V3_PA_OUT

Inductor to power supply and matching network for power amplifier output

4

GND4

Ground

5

GND3

Ground

6

NC

Not connected

7

GND2

Ground

8

LNA_IN

Low-noise amplifier input

9

GND1

Ground

10

BIAS_LNA

Resistor to V

11

VS_CTRL

Supply voltage for control of power amplifier

12

GND5

Ground

13

LNA_OUT

Low-noise amplifier output and supply voltage

14

GND4

Ground

15

PA_IN

Power amplifier input

16

GND3

Ground

17

POUT_CONTROL

Power amplifier control input

18

GND6

Ground

19

V2_PA

Supply voltage for power amplifier

20

GND5

Ground