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MM54HC181 Datasheet(PDF) 1 Page - National Semiconductor (TI) |
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MM54HC181 Datasheet(HTML) 1 Page - National Semiconductor (TI) |
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1 / 10 page ![]() TLF5320 January 1988 MM54HC181MM74HC181 Arithmetic Logic UnitsFunction Generators General Description These arithmetic logic units (ALU)function generators uti- lize advanced silicon-gate CMOS technology They possess the high noise immunity and low power consumption of standard CMOS integrated circuits as well as the ability to drive 10 LS-TTL loads The MM54HC181MM74HC181 are arithmetic logic unit (ALU)function generators that have a complexity of 75 equivalent gates on a monolithic chip These circuits per- form 16 binary arithmetic operations on two 4-bit words as shown in Tables 1 and 2 These operations are selected by the four function-select lines (S0 S1 S2 S3) and include addition subtraction decrement and straight transfer When performing arithmetic manipulations the internal car- ries must be enabled by applying a low-level voltage to the mode control input (M) A full carry look-ahead scheme is made available in these devices for fast simultaneous carry generation by means of two cascade-outputs (pins 15 and 17) for the four bits in the package When used in conjunc- tion with the MM54HC182 or MM74HC182 full carry look- ahead circuits high-speed arithmetic operations can be per- formed The method of cascading HC182 circuits with these ALU’s to provide multi-level full carry look-ahead is illustrat- ed under typical applications data for the MM54HC182 MM74HC182 If high speed is not of importance a ripple-carry input (Cn) and a ripple-carry output (Cna4) are available However the ripple-carry delay has also been minimized so that arith- metic manipulations for small word lengths can be per- formed without external circuitry Features Y Full look-ahead for high-speed operations on long words Y Arithmetic operating modes Addition Subtraction Shift operand a one position magnitude comparison Plus twelve other arithmetic operations Y Logic function modes Exclusive-OR Comparator AND NAND OR NOR Plus ten other logic operations Y Wide operating voltage range 2V – 6V Y Low input current 1 mA maximum Y Low quiescent current 80 mA maximum Connection Diagram Dual-In-Line Package TLF5320 – 1 Top View Order Number MM54HC181 or MM74HC181 Pin Designations Designation Pin Nos Function A3 A2 A1 A0 19 21 23 2 Word A Inputs B3 B2 B1 B0 18 20 22 1 Word B Inputs S3 S2 S1 S0 3 4 5 6 Function-Select Inputs Cn 7 Inv Carry Input M8 Mode Control Input F3 F2 F1 F0 13 11 10 9 Function Outputs A e B 14 Comparator Outputs P15 Carry Propagate Output Cna4 16 Inv Carry Output G17 Carry Generate Output VCC 24 Supply Voltage GND 12 Ground C1995 National Semiconductor Corporation RRD-B30M105Printed in U S A |
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