Data Sheet

ADR1399

THEORY OF OPERATION

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Rev. A | 11 of 16

OPERATING SET TEMPERATURE

The ADR1399 contains a buried Zener diode with an approximate

+2 mV/℃ temperature coefficient, in series with an NPN, base

coefficient. The combined positive and negative temperature coeffi-

cients sum to a nominal 0 mV/℃ overall temperature coefficient.

There are two op-amp servo loops inside the ADR1399. One

with the total current set by an externally applied pull-up resistor or

current source. Another op-amp loop maintains the device die at

a nonadjustable set temperature of approximately 95℃, precluding

the external ambient temperature fluctuations from affecting operat-

ing temperature. The entire system is provided in a simple 4-pin,

hermetically sealed, TO-46 package and placed inside a plastic

thermal insulator, which further keeps ambient fluctuations at bay

and reduces the required heater power. If the ambient temperature

exceeds the set temperature, the chip temperature control becomes

open loop, and the temperature rejection of the device degrades

while the excess ambient temperature condition persists.

With only an external supply and a pull-up resistor required for

operation, the ADR1399 is simple to use. However, because it

is so extremely stable, care must be taken to avoid degrading

overall performance with external thermocouples and/or IR drops.

For example, the heater current can be quite high; therefore, avoid

sharing the heater current path with the Zener sense path. In

addition, wherever metallurgic junctions are formed, such as where

the device pins enter the board or where the reference voltage may

be connectorized, try to ensure that junctions are paired and with

similar thermal gradients. Parasitic thermocouples can simply add

temperature dependencies from 1 μV/℃ up to 40 μV/℃. See Appli-

cation Note 86, A Standards Lab Grade 20-Bit DAC with 0.1ppm/°C

Drift for additional information on thermoelectric potentials.

THERMAL RESISTANCE

The ADR1399 has an on-chip automated heater set to approxi-

mately 95°C. The TO-46 comes from the factory provided with a

small plastic shield to keep air flow away from the reference. The

factory included plastic air shield around the TO-46 reduces the

effective net thermal resistance compared to a TO-46 without a

shield. Techniques to increase thermal resistance include reducing

solid copper planes in proximity to the device and elevating the

device on its leads, approximately 1 cm above the board surface.

A hatch ground on the bottom side of the board increases thermal

resistance compared to a solid ground plane. The heater power

for the LCC version is about 3× to 4× greater than the TO-46

version. To reduce heater power, keep copper away from the inner

layers near the device and use a hatch ground on the bottom

layer. The slotting method (Application Note 82, Understanding

and Applying Voltage References), which was originally intended

to isolate references from externally applied flexing on the board,

helps to increase thermal resistance. Combining a copper keepout

area, hatching the bottom side ground layer, and extreme slotting

or isothermal islands keeps the PCB from drawing excessive heat

from the ovenized reference. After assembly, an external enclosure

or insulation can further reduce the heat loss and consequent

power draw.

FORCE AND SENSE PINS

The LCC version adds four pins, two of which are not internally con-

nected (NIC) and the other two split the active reference into force

and sense action on the top and bottom of the shunt. The force pins

(+REFF and −REFF) are similar to op amp outputs, and the sense

pins (+REFS and −REFS) are similar to the feedback pins of an

op amp in that they sense the output to close the feedback loop.

However, they differ from op amps because the sense pins have

2.2 mA of bias current, which is orders of magnitude more than

any op amp input, for example. Additionally, whereas an op amp is

often designed in to have the output node at the correct voltage,

the ADR1399 is designed to have the sense node at the most

accurate voltage. For example, when some resistance is placed

between the +REFF and +REFS pins, all the IR drop induced in

the resistance, including the IR noise induced by approximately 10

pA/rtHz of current noise, is transferred to the +REFF pin and does

not appear at the +REFS pin. For the most accurate reading of the

reference voltage, sense the reference voltage at the +REFS and

−REFS pins, and not at the force pins.

The ADR1399 is characterized typically at 3 mA, and between 3

mA and 10 mA. Of the 3 mA, 2.2 mA is allocated to the ±REFS

pins. 2.2 mA flows into the +REFS pin, and 2.2 mA flows out of the

−REFS pin. The typical 3 mA is composed of an additional 0.8 mA

flowing in and out of the +REFF and −REFF pins, respectively. At

10 mA, the sense pins remain at 2.2 mA and the extra 7.8 mA is

regulated by the force pins.