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71M6541F Datasheet(PDF) 54 Page - Maxim Integrated Products |
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71M6541F Datasheet(HTML) 54 Page - Maxim Integrated Products |
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54 / 166 page ![]() 71M6541D/F/G and 71M6542F/G Data Sheet 54 Rev 5 Referring to Figure 17, the table lookup method uses the 10-bits plus sign-bit value in STEMP[10:0] right- shifted by two bits to obtain an 8-bit plus sign value (i.e., NV RAM Address = STEMP/4). A limiter ensures that the resulting look-up address is in the 6-bit plus sign range of -64 to +63 (decimal). The 8-bit NV RAM content pointed to by the address is added as a 2’s complement value to 0x40000, the nominal value of 4*RTC_P + RTC_Q. Refer to 2.5.4.3 RTC Rate Control for information on the rate adjustments performed by registers RTC_P[16:0] (I/O RAM 0x289B[2:0], 0x289C, 0x289D[7:2]) and RTC_Q[1:0] (I/O RAM 0x2891[1:0]. The 8-bit values loaded in to NV RAM must be scaled correctly to produce rate adjustments that are consistent with the equations given in 2.5.4.3 RTC Rate Control for RTC_P and RTC_Q. Note that the sum of the 8-bit 2’s complement value looked-up and 0x40000 form a 19-bit value, which is equal to 4*RTC_P+RTC_Q, as shown in Figure 17. The output of the Temperature Compensation is automatically loaded into the RTC_P[16:0] and RTC_Q[1:0] locations after each look-up and summation operation. S 0x40000 19 10+S STEMP >>2 63 -64 -64 63 255 -256 LIMIT Look Up RAM ADDR 6+S 8+S Q 7+S 4*RTC_P+RTC_Q 19 Figure 17: Automatic Temperature Compensation The 128 NV RAM locations are organized in 2’s complement format as shown in Table 44. As mentioned above, the STEMP[10:0] digital temperature values are scaled such that the corresponding NV RAM addresses are equal to STEMP[10:0]/4 (limited in the range of -64 to +63). See 2.5.5 71M654x Temperature Sensor on page 56 for the equations to calculate temperature in degrees °C from the STEMP[10:0] reading. The temperature equation is used to calculate the two temperature columns in Table 44 (the second column and the rightmost column). The second column uses the full 11-bit values of STEMP[10:0], while the values in the rightmost column are calculated using the post-limiter (6+S) values multiplied by 4. Since each look-up table address step corresponds to a 4 x 0.325 °C temperature step, two is added to the post-limiter 6+S value after multiplying by 4 to calculate the temperature values in the rightmost column. This method ensures that the compensation data is loaded into the look-up table in a manner that minimizes quantization error. Table 44 shows the numerical values corresponding to each node in Figure 17. The values of STEMP[10:0] outside the -256 to +255 range are not shown in this table. The limiter output is confined to the range of -64 to +63, which is directly the desired address of the 128-byte look-up table. The rightmost column gives the nominal temperature corresponding to each address cell in the 128-byte compensation table Table 44: NV RAM Temperature Table Structure STEMP[10:0] (10+S) (decimal) Temp ( oC) (Equation) STEMP[10:0]>>2 (8+S) (decimal) Limiter Output (6+S) (decimal) Temp ( oC) (LU Table) -256 -61.71 -64 -64 -61.06 -255 -61.39 -254 -61.06 -253 -60.73 … … … … … -4 20.69 -1 -1 21.35 -3 21.02 -2 21.35 -1 21.67 |
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