ADP1653_V01 datasheet(19/24 Pages) AD

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Data Sheet

ADP1653

Rev. C | Page 19 of 24

Table 11. Recommended Schottky Diodes

Vendor

IPEAK

(A)

IAVE

(A)

(V)

Part No.

Dimensions

L × W × H (mm)

BAT20J

1.65 × 1.25 × 1.0

Rohm

RB161VA-20

1.9 × 1.3 × 0.6

ON Semi

MBR120LSFT1

2.7 × 1.65 × 0.95

Philips

PMEG2020EJ

1.7 × 1.25 × 0.72

Selecting the Output Capacitor

The output capacitor maintains the output voltage and supplies

the HPLED current when the LX switch is on. It also stabilizes

the loop. A 4.7 μF, 16 V X5R/X7R ceramic capacitor is generally

recommended. The minimum required capacitance for loop

stability for the two-LED and one-LED cases is shown in Figure 31

and Figure 32, respectively. Choose a capacitor with a capacitance

greater than the minimum shown in Figure 31 and Figure 32

for the worst-case dc bias voltage and temperature condition.

Note that dc bias characterization data is available from

capacitor manufacturers and should be taken into account

when selecting input and output capacitors. 16 V capacitors are

recommended for most two-LED designs. Designs with 1 mm

height restrictions can also use 0603 case size, 16 V capacitors

in parallel.

Table 12. Recommended Output Capacitors

Vendor

Value

Part No.

Dimensions

L × W × H (mm)

Murata

4.7 μF, 16 V

GRM21BR61C475KA88

2 × 1.25 × 1.25

TDK

4.7 μF, 16 V

C2012X5R1C475K

2 × 1.25 × 1.25

Murata

4.7 μF, 10 V

GRM219R61A475KE34

2 × 1.25 × 0.95

TDK

4.7 μF, 10 V

C1608X5R1A475K

1.6 × 0.8 × 0.8

4.5

0500

HPLED CURRENT, 2 LED CASE (mA)

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

100

200

300

400

2.2μH + 20%

3.3μH+ 20%

OUT = 6.3V, VDD =3.2V

OUT = 8.3V, VDD =3.2V

OUT = 6.3V, VDD =4.2V

OUT = 8.3V, VDD =4.2V

OUT = 6.3V, VDD =3.2V

OUT = 8.3V, VDD =3.2V

OUT = 6.3V, VDD =4.2V

OUT = 8.3V, VDD =4.2V

Figure 31. Minimum Output Capacitance for L = 3.3 μH + 20% and

L = 2.2 μH + 20% for Two-LED Designs

4.0

500

HPLED CURRENT, 1 LED CASE (mA)

3.5

3.0

2.5

2.0

1.5

1.0

0.5

100

150

200

250

300

350

400

450

2.2μH + 20%

OUT = 3.3V, VDD =3.2V

OUT = 4.3V, VDD =3.2V

OUT = 4.3V, VDD =4.2V

Figure 32. Minimum Output Capacitance for L = 2.2 μH + 20%

for One-LED Design

5.0

012

DC BIAS (V)

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

2468

–40°C (10V)

+85°C (10V)

Figure 33. DC Bias Characteristic of a 10 V, 4.7 μF Ceramic Capacitor

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