SIC402DB datasheet(2/26 Pages) VISHAY

2 / 26 page

SiC402A, SiC402BCD

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Vishay Siliconix

S20-0483-Rev. D, 29-Jun-2020

Document Number: 63729

For technical questions, contact: powerictechsupport@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

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PIN CONFIGURATION (Top View)

SiC402A/B Pin Configuration (Top View)

PIN DESCRIPTION

PIN NUMBER

SYMBOL

DESCRIPTION

1FB

Feedback input for switching regulator used to program the output voltage - connect to an external

resistor divider from VOUT to AGND

2VOUT

Switcher output voltage sense pin - also the input to the internal switch-over between VOUT and

VLDO. The voltage at this pin must be less than or equal to the voltage at the VDD pin

3VDD

Bias supply for the IC - when using the internal LDO as a bias power supply, VDD is the LDO output.

When using an external power supply as the bias for the IC, the LDO output should be disabled

4, 30, PAD 1

AGND

Analog ground

5FBL

Feedback input for the internal LDO - used to program the LDO output. Connect to an external

resistor divider from VDD to AGND

6, 9 to 11, PAD 2

VIN

Input supply voltage

7SS

The soft start ramp will be programmed by an internal current source charging a capacitor on this

pin.

8BST

Bootstrap pin - connect a capacitor of at least 100 nF from BST to LX to develop the floating supply

for the high side gate drive

12, 14

No connection

LXBST

LX boost - connect to the BST capacitor

23 to 25, PAD 3

Switching (phase) node

15 to 22

PGND

Power ground

PGOOD

Open-drain power good indicator - high impedance indicates power is good. An external pull-up

resistor is required

IILIM

Current limit sense pin - used to program the current limit by connecting a resistor from ILIM to LXS

LXS

LX sense - connects to RILIM

EN/PSV

Enable/power-save input for the switching regulator - connect to AGND to disable the switching

regulator, connect to VDD to operate with power-save mode and float to operate in forced

continuous mode

tON

On-time programming input - set the on-time by connecting through a resistor to AGND

ENL

Enable input for the LDO - connect ENL to AGND to disable the LDO. Drive with logic signal for logic

control, or program the VIN UVLO with a resistor divider between VIN, ENL, and AGND

PAD 1

AGND

PAD 3

PAD 2

VIN

PGND

BST

VIN

FBL

AGND

VDD

VOUT

30 29

ORDERING INFORMATION

PART NUMBER

PACKAGE

MARKING

(LINE 1: P/N)

SiC402ACD-T1-GE3

PowerPAK

MLP32-55G

SiC402A

SiC402BCD-T1-GE3

SiC402B

SiC402DB

Reference board

Format:

Line 1: Dot

Line 2: P/N

Line 3: Siliconix Logo + LOT Code + ESD Symbol

Line 4: Factory Code + Year Code + Work Week Code

P/N

Fyww

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