SiC620R, SiC620AR

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Vishay Siliconix

S20-0486, Rev. C 29-Jun-2020

2

Document Number: 63589

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

PINOUT CONFIGURATION

Fig. 2 - SiC620R and SiC620AR Pin Configuration

PIN CONFIGURATION

PIN NUMBER

NAME

FUNCTION

1PWM

PWM control input

2

ZCD_EN#

ZCD control. Active low

Supply voltage for internal logic circuitry

4, 32

Analog ground for the driver IC

5

BOOT

High side driver bootstrap voltage

6GH

High side gate signal

7

PHASE

Return path of high side gate driver

8 to 11, 34

Power stage input voltage. Drain of high side MOSFET

12 to 15, 28, 35

Power ground

16 to 26

Switch node of the power stage

27, 33

GL

Low side gate signal

29

Supply voltage for internal gate driver

30

THWn

Thermal warning open drain output

31

DSBL#

Disable pin. Active low

8

9

15

24

31

23

BOOT

PHASE

GH

1

14

13

12

11

10

7

6

5

4

3

2

17

18

19

20

21

22

25

26

27

28

29

30

PWM

SMOD#

8

9

15

24

31

23

16

BOOT

PHASE

GH

1

14 13 12

11 10

7

6

5

4

3

2

17

18

19

20

21

22

25 26 27 28 29 30

PWM

SMOD#

32

AGND

33

GL

Top view

Bottom view