SiC634

www.vishay.com

Vishay Siliconix

S20-0485-Rev. C, 29-Jun-2020

2

Document Number: 76784

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

PINOUT CONFIGURATION

Fig. 2 - SiC634 Pin Configuration

PIN CONFIGURATION

PIN NUMBER

NAME

FUNCTION

1

PWM

PWM input logic

2

ZCD_EN#

The ZCD_EN# pin enables or disables diode emulation. When ZCD_EN# is LOW, diode emulation is

allowed. When ZCD_EN# is HIGH, continuous conduction mode is forced.



ZCD_EN# can also be put in a high impedance mode by floating the pin. If both ZCD_EN# and PWM

are floating, the device shuts down and consumes typically 3 μA (9 μA max.) current

Supply voltage for internal logic circuitry

5

BOOT

High-side driver bootstrap voltage

4, 6, 30, 31

N.C.

connected to GND or not internally connected depending on manufacturing

location.

Factory code “T” on line 3, pin 4 = not internally connected

7

PHASE

Return path of high-side gate driver

8 to 11, 34

Power stage input voltage. Drain of high-side MOSFET

12 to 15, 28, 35

Power ground

16 to 26

Phase node of the power stage

27, 33

GL

Low-side MOSFET gate signal

29

Supply voltage for internal gate driver

32

Signal ground

ORDERING INFORMATION

PART NUMBER

PACKAGE

MARKING CODE

OPTION

SiC634CD-T1-GE3

PowerPAK MLP55-31L

SiC634

5 V PWM optimized

SiC634DB

Reference board

N.C.

BOOT

PHASE

V

IN

N.C.

PWM

ZCD_EN#

V

CIN

PGND

VIN

CGND

GL

N.C.

BOOT

PHASE

V

IN

N.C.

PWM

ZCD_EN#

V

CIN

35

P

GND

34

V

IN

32

C

GND

GL

2

1

4

3

6

5

8

7

24

25

26

27

28

29

30

31

15

14

13

12

11

10

9

2

1

4

3

6

5

8

7

15 14 13 12

11 10

9

24 25 26 27 28 29 30 31

V

33

GL

V

V

V

V

V

V

V

23 V

SWH

22 V

SWH

21 V

SWH

20 V

SWH

19 V

SWH

16 V

SWH

18 V

SWH

17 V

SWH

G Y W W

P/N

LL

T Y W W

P/N

LL