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MAX1677EEE Datasheet(PDF) 11 Page - Maxim Integrated Products |
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MAX1677EEE Datasheet(HTML) 11 Page - Maxim Integrated Products |
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11 / 16 page ![]() Compact, High-Efficiency, Dual-Output Step-Up and LCD Bias DC-DC Converter ______________________________________________________________________________________ 11 During PFM operation, the error comparator detects when the output voltage is out of regulation and sets a flip-flop, turning on the N-channel MOSFET switch (Figure 5). When the inductor current ramps to the PFM mode current limit (350mA), the current-sense compara- tor resets a flip-flop. The flip-flop turns off the N-channel switch and turns on the P-channel synchronous rectifier. The energy stored in the inductor is transferred to the output through the P-channel switch. A second flip-flop, previously reset by the switch’s “on” signal, inhibits the next cycle until the inductor current is depleted and the output is out of regulation. This forces operation with discontinuous inductor current in PFM mode. Startup Oscillator The MBC employs a low-voltage startup oscillator to ensure a 1.1V (0.9V typical) startup voltage. On start- up, if the output voltage is less than 2.25V, the P-chan- nel switch stays off and the N-channel pulses at a 25% duty cycle. When the output voltage exceeds 2.25V, the normal PWM or PFM control circuitry takes over. Once the MBC is in regulation, it can operate with inputs down to 0.7V since the internal power for the IC is taken from OUT. The MBC cannot supply full output current until OUT reaches 2.5V. Synchronous Rectifier The MAX1677 MBC features an internal 1 Ω P-channel synchronous rectifier. Synchronous rectification typical- ly improves efficiency by 5% or more over similar non- synchronous step-up designs. In PWM mode, the synchronous rectifier turns on during the second half of each cycle. In PFM mode, an internal comparator turns on the synchronous rectifier when the voltage at LX exceeds the MBC output, and then turns it off when the inductor current drops below 90mA (typ). The on-chip synchronous rectifier allows the external Schottky diode to be omitted in designs that operate from inputs exceeding 1.4V. In circuits operating below 1.4V (1-cell inputs, for example), connecting a Schottky diode in parallel with the internal synchronous rectifier (from LX to POUT) provides the lowest startup voltage. LCD Boost Converter (LCD) The LCD converter can be configured for a positive or negative output by setting the LCDPOL pin and using the appropriate circuit (Figures 2 and 3, and Table 3). A combination of peak current limiting and a pair of one-shot timers control LCD switching. During the on- cycle the internal N-channel DMOS switch turns on, and inductor current ramps up until either the switch peak current limit is reached or the 5.2µs maximum on- time expires (typically at low input voltages). After the on-cycle terminates, the switch turns off and the output capacitor charges. The switch remains off until the error comparator initiates another cycle. The LCDLX current limit is set by LCDPOL, as outlined in Table 3. The lower, 225mA peak current setting allows tiny low-current “chip” inductors to be used when powering smaller (less than 15 square inches) liquid crystal panels. Use the following equation to determine which LCDLX current-limit setting is required. ILCD = (0.7 × IPK(LCD) × VIN(MIN)) / (2 × VLCD(MAX)) where ILCD is the output current, VIN(MIN) is the mini- mum expected input voltage, VLCD(MAX) is the maxi- mum required LCD output voltage, and IPK(LCD) is 350mA or 225mA as set by LCDPOL. The 0.7 term is a correction factor to conservatively account for typical switch, inductor, and diode losses. The LCD boost is enabled when both ON and LCDON are high, and the MBC output voltage is within 90% of its set value. A soft-start startup mode with increased CLK/SEL 0 1 PWM Low-Power PFM MBC MODE FEATURES Lowest Supply Current High Output Current, Fixed-Frequency Ripple Ext Clock (200Hz to 400kHz) Synchronized PWM High Output Current, Synchronized Ripple Frequency Table 2. Selecting MBC Operating Mode R S Q R D Q Q CURRENT LIMIT LEVEL VREF VFB POUT LX P N PGND LOGIC HIGH Figure 5. Controller Block Diagram in PFM Mode |
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