AD4030-24BBCZ datasheet(2/48 Pages) AD

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Data Sheet

AD4030-24

TABLE OF CONTENTS

analog.com

Rev. 0 | 2 of 48

Features................................................................ 1

Applications........................................................... 1

Functional Block Diagram......................................1

General Description...............................................1

Specifications........................................................ 3

Timing Specifications......................................... 5

Absolute Maximum Ratings................................. 11

Thermal Resistance..........................................11

Electrostatic Discharge (ESD) Ratings.............11

ESD Caution.....................................................11

Pin Configuration and Function Descriptions...... 12

Typical Performance Characteristics................... 14

Terminology......................................................... 18

Integral Nonlinearity Error (INL)....................... 18

Differential Nonlinearity Error (DNL).................18

Zero Error (ZE)................................................. 18

Gain Error (GE)................................................ 18

Spurious-Free Dynamic Range (SFDR)...........18

Effective Number of Bits (ENOB)..................... 18

Total Harmonic Distortion (THD)...................... 18

Dynamic Range (DR)....................................... 18

Signal-to-Noise Ratio (SNR)............................ 18

Signal-to-Noise-and-Distortion (SINAD)

Ratio............................................................... 18

Aperture Delay................................................. 18

Transient Response......................................... 18

Common-Mode Rejection Ratio (CMRR)......... 18

Power Supply Rejection Ratio (PSRR)............ 18

Theory of Operation.............................................19

Overview.......................................................... 19

Converter Operation.........................................19

Transfer Function............................................. 20

Analog Features...............................................20

Digital Sample Processing Features................ 20

Applications Information...................................... 23

Typical Application Diagrams........................... 23

Analog Front-End Design.................................23

Reference Circuitry Design ............................. 23

Device Reset....................................................25

Power Supplies................................................ 25

Serial Interface.................................................... 27

SPI Signals.......................................................27

Sample Conversion Timing and Data

Transfer.......................................................... 29

Clocking Modes ...............................................30

Data Clocking Requirements and Timing.........33

Layout Guidelines................................................37

Registers............................................................. 38

Interface Configuration A Register................... 39

Interface Configuration B Register................... 39

Device Configuration Register..........................40

Chip Type Register...........................................40

Product ID Low Register.................................. 40

Product ID High Register..................................40

Chip Grade Register.........................................41

Scratch Pad Register....................................... 41

SPI Revision Register...................................... 41

Vendor ID Low Register................................... 42

Vendor ID High Register...................................42

Stream Mode Register..................................... 42

Interface Status A Register.............................. 42

EXIT Configuration Mode Register...................43

Averaging Mode Register.................................43

Offset Registers................................................43

Gain Registers..................................................44

Modes Register................................................ 45

Internal Oscillator Register............................... 45

Output Driver Register......................................46

Test Pattern Registers...................................... 46

Digital Diagnostics Register............................. 47

Digital Errors Register...................................... 47

Outline Dimensions............................................. 48

Ordering Guide.................................................48

Evaluation Boards............................................ 48

REVISION HISTORY

4/2022—Revision 0: Initial Version

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