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DG2018DN Datasheet(PDF) 2 Page - Vishay Siliconix |
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DG2018DN Datasheet(HTML) 2 Page - Vishay Siliconix |
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2 / 10 page ![]() www.vishay.com 2 Document Number: 72342 S-82626-Rev. C, 03-Nov-08 Vishay Siliconix DG2018, DG2019 FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION Notes: a. Signals on NC, NO, or COM or IN exceeding V+ will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads welded or soldered to PC board. c. Derate 4.0 mW/°C above 70 °C. IN NO4 COM2 NO2 NC3 VL NC1 COM4 1 2 3 12 11 10 49 56 8 16 15 14 13 NC2 GND NO3 COM3 COM1 NO1 V+ NC4 Top View DG2019DN QFN-16 (3 X 3) 7 TRUTH TABLE Logic NC1, 2, 3 and 4 NO1, 2, 3 and 4 0ON OFF 1OFF ON ORDERING INFORMATION Temp. Range Package Part Number - 40 °C to 85 °C QFN-16 (3 x 3 mm) DG2019DN ABSOLUTE MAXIMUM RATINGS Parameter Limit Unit Reference V+ to GND - 0.3 to + 6 V IN, COM, NC, NO - 0.3 to (V+ + 0.3) Continuous Current (Any terminal) ± 50 mA Peak Current (Pulsed at 1 ms, 10 % Duty Cycle) ± 100 Storage Temperature (D Suffix) - 65 to 150 °C Power Dissipation (Packages)b QFN-16 (3 x 3 mm)c 850 mW |
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