M64894FP/GP

SERIAL INPUT PLL FREQUENCY SYNTHESIZER FOR TV/VCR

5

METHOD OF SETTING DATA

The input information to consit of 2 or data of 4bytes to lead to Chip

protocol admitted in the following.

1_STA CA

CB

BB

STO

2_STA CA

D1

D2

STO

3_STA CA

CB

BB

D1

D2

STO

4_STA CA

D1

D2

CB

BB

STO

STA : Start condition

STO : Stop condition

CA

: Chip address

CB

: Control data byte

BB

: BandS.W. data byte

D1

: Divider data byte

D2

: Divider data byte

The information of 5 bytes necessary for circuit operation is chip

address and control data, bandS.W. data of 2 bytes and divider byte

of 2 bytes. After the chip address input, 2 or data of 4 bytes are

received.

Function bit is contained the first and the third data byte to

distinguish between divider data and control data, band data, and

"0" goes ahead of divider data, and "1" goes ahead of control data,

bandS.W. data.

Write mode format

Read mode format

Byte

MSB

LSB

Address Byte

11000

MA1

MA0

0

A

Devider Byte1

0

N14

N13

N12

N11

N10

N9

N8

A

Devider Byte2

N7

N6

N5

N4

N3

N2

N1

N0

A

Control Byte1

1

CP

T2

T1

T0

RSa

RSb

OS

A

Band SW Byte

XXXX

BS4

BS3

BS2

BS1

A

Byte

MSB

LSB

Address Byte

11000

MA1

MA0

1

A

Status Byte1

POR

FL

X

X

X

A2

A1

A0

A

ADDRESS

CA

0

ACK

DATA

ACK

DATA

ACK

1-7

8

9

1-7

8

9

1-7

8

9

SDA

SCL

S

STA

P

STO