VB40100C

www.vishay.com

Vishay General Semiconductor

Revision: 20-Jun-2018

3

Document Number: 87987

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

Fig. 5 - Typical Junction Capacitance Per Diode

Fig. 6 - Typical Transient Thermal Impedance Per Diode

PACKAGE OUTLINE DIMENSIONS in inches (millimeters)

110

100

0.1

Reverse Voltage (V)

10 000

1000

100

10

1

0.1

0.01

0.1

1

10

100

t - Pulse Duration (s)

Junction to Case

Mounting Pad Layout

0.670 (17.02)

0.591 (15.00)

0.105 (2.67)

0.095 (2.41)

0.08 (2.032) MIN.

0.15 (3.81) MIN.

0.33 (8.38) MIN.

0.42 (10.66) MIN.

12

K

K

0.140 (3.56)

0.110 (2.79)

0.021 (0.53)

0.014 (0.36)

0.110 (2.79)

0.090 (2.29)

0 to 0.01 (0 to 0.254)

0.055 (1.40)

0.047 (1.19)

0.055 (1.40)

0.045 (1.14)

0.190 (4.83)

0.160 (4.06)

0.205 (5.20)

0.195 (4.95)

0.624 (15.85)

0.591 (15.00)

0.037 (0.940)

0.027 (0.686)

0.105 (2.67)

0.095 (2.41)

0.360 (9.14)

0.320 (8.13)

0.411 (10.45)

0.380 (9.65)

0.245 (6.22)

MIN.