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LTM4686BIVPBF Datasheet(PDF) 107 Page - Analog Devices |
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LTM4686BIVPBF Datasheet(HTML) 107 Page - Analog Devices |
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107 / 130 page ![]() LTM4686B 107 Rev. 0 For more information www.analog.com APPENDIX C: PMBUS COMMAND DETAILS Table 29. GPIOn Propagate Fault Configuration. The GPIO0 and GPIO1 pins are designed to provide electrical notification of selected events to the user. Some of these events are common to both output channels. Others are specific to an output channel. They can also be used to share faults between channels. BIT(S) SYMBOL OPERATION b[3] Reserved b[2] Mfr_gpio0_propagate_iout_oc, Mfr_gpio1_propagate_iout_oc 0: No action if the IOUT_OC_FAULT_LIMIT fault is asserted 1: Associated output will be asserted low if the IOUT_OC_FAULT_LIMIT fault is asserted GPIO0 is associated with page 0 OC faults GPIO1 is associated with page 1 OC faults b[1] Mfr_gpio0_propagate_vout_uv, Mfr_gpio1_propagate_vout_uv 0: No action if the VOUT_UV_FAULT_LIMIT fault is asserted 1: Associated output will be asserted low if the VOUT_UV_FAULT_LIMIT fault is asserted GPIO0 is associated with page 0 UV faults GPIO1 is associated with page 1 UV faults b[0] Mfr_gpio0_propagate_vout_ov, Mfr_gpio1_propagate_vout_ov 0: No action if the VOUT_OV_FAULT_LIMIT fault is asserted 1: Associated output will be asserted low if the VOUT_OV_FAULT_LIMIT fault is asserted GPIO0 is associated with page 0 OV faults GPIO1 is associated with page 1 OV faults *The PWRGD status is designed as an indicator and not to be used for power supply sequencing. Fault Sharing Response COMMAND NAME CMD CODE DESCRIPTION TYPE PAGED DATA FORMAT UNITS NVM DEFAULT VALUE MFR_GPIO_RESPONSE 0xD5 Action to be taken by the device when the GPIOn pin is asserted low. R/W Byte Y Reg Y 0x00 MFR_GPIO_RESPONSE This command determines the controller’s response to the GPIOn pin being pulled low by an external source. VALUE MEANING 0xC0 GPIO_INHIBIT The LTM4686B will three-state the output in response to the GPIOn pin pulled low. 0x00 GPIO_IGNORE The LTM4686B continues operation without interruption. The device also: • Sets the NONE_OF_THE_ABOVE bit in the STATUS_BYTE • Sets the MFR bit in the STATUS_WORD • Sets the GPIOB bit in the STATUS_MFR_SPECIFIC command, and • Notifies the host by asserting ALERT pin, unless masked. The ALERT pin pulled low can be disabled by setting bit[1] of MFR_CHAN_CFG. This command has one data byte. |
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