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SIE882DF Datasheet(PDF) 1 Page - Vishay Siliconix |
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SIE882DF Datasheet(HTML) 1 Page - Vishay Siliconix |
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1 / 10 page ![]() SiE882DF www.vishay.com Vishay Siliconix S09-1221-Rev. A, 29-Jun-09 1 Document Number: 65002 For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 N-Channel 25 V (D-S) MOSFET FEATURES • TrenchFET® Gen III power MOSFET • Ultra low thermal resistance using top-exposed PolarPAK® package for double-sided cooling • Leadframe-based encapsulated package - Die not exposed - Same layout regardless of die size, 100 V •Low Qgd/Qgs ratio helps prevent shoot-through • 100 % Rg and UIS tested • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 APPLICATIONS •VRM • DC/DC conversion: low side • Server VCORE Notes a. Package limited is 60 A b. Surface mounted on 1" x 1" FR4 board c. t = 10 s d. See solder profile (www.vishay.com/doc?73257). The PolarPAK is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components PRODUCT SUMMARY VDS (V) 25 RDS(on) max. () at VGS = 10 V 0.0014 RDS(on) max. () at VGS = 4.5 V 0.0018 Qg typ. (nC) 46 ID (A) a (package limit) 60 ID (A) a (silicon limit) 229 Configuration Single PolarPAK® Top View D D 10 G 9 S 8 S 7 D 6 D 1 G 2 S 3 S 4 D 5 Bottom View D S G D 10 9 8 7 6 1 2 3 4 5 Top surface is connected to pins 1, 5, 6, and 10 N-Channel MOSFET G D S ORDERING INFORMATION Package PolarPAK Lead (Pb)-free and halogen-free SiE882DF-T1-GE3 ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT UNIT Drain-source voltage VDS 25 V Gate-source voltage VGS ± 20 Continuous drain current (TJ = 150 °C) TC = 25 °C ID 60 a (package limit) A 229 (silicon limit) TC = 70 °C 60 a TA = 25 °C 47 b, c TA = 70 °C 41 b, c Pulsed drain current IDM 100 Continuous source-drain diode current TC = 25 °C IS 60 a TA = 25 °C 4.3 b, c Single pulse avalanche current L = 0.1 mH IAS 50 Avalanche energy EAS 125 mJ Maximum power dissipation TC = 25 °C PD 125 W TC = 70 °C 80 TA = 25 °C 5.2 b, c TA = 70 °C 3.3 b, c Operating junction and storage temperature range TJ, Tstg -55 to +150 °C Soldering recommendations (peak temperature) d, e 260 |
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