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R7FA6T2AB3CFM Datasheet(PDF) 61 Page - Renesas Technology Corp

Part # R7FA6T2AB3CFM
Description  Renesas Microcontrollers
PDF  93 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R7FA6T2AB3CFM Datasheet(HTML) 61 Page - Renesas Technology Corp

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Table 2.35
A/D conversion characteristics (2 of 2)
Parameter
Min
Typ
Max Unit Test conditions
High-precision
channels
(AN012 to AN017)
Conversion time*1
(operation at
ADCLK = 50 MHz)
Permissible
signal source
impedance
Max. = 50 Ω
Normal
conversion
0.28 —
—
µs
● Sampling time: 9 ADCLK
● Successive approximation
time: 5 ADCLK
When using
averaging mode
(4-time
conversion)
1.12 —
—
µs
Offset error
—
±1.0 ±1.5 LSB  
Full-scale error
—
±1.0 ±2.5 LSB  
Absolute accuracy
Normal conversion
—
±4.0 ±7.0 LSB  
When using averaging mode
(4-time conversion)
—
±3.0 ±5.5 LSB  
Total unadjusted error (TUE)
 
±3.4 ±4.4 LSB Excludes quantization error
(±0.5LSB).
DNL differential nonlinearity error
—
-1 to
+1.5
-1 to
+2.5
LSB  
INL integral nonlinearity error
—
±2.0 ±3.0 LSB  
Normal-precision
channels
(AN020 to AN028)
Conversion time*1
(operation at
ADCLK = 50 MHz)
Permissible
signal source
impedance
Max. = 50 Ω
Normal
conversion
0.50 —
—
µs
● Sampling time: 20 ADCLK
● Successive approximation
time: 5 ADCLK
When using
averaging mode
(4-time
conversion)
2.00 —
—
µs
Offset error
—
±1.0 ±2.5 LSB  
Full-scale error
—
±1.5 ±2.5 LSB  
Absolute accuracy
Normal conversion
—
±5.5 ±8.0 LSB  
When using averaging mode
(4-time conversion)
—
±5.5 ±7.0 LSB  
Total unadjusted error (TUE)
—
±4.2 ±5.3 LSB Excludes quantization error
(±0.5LSB).
DNL differential nonlinearity error
—
-1 to
+1.5
-1 to
+2.5
LSB  
INL integral nonlinearity error
—
±2.0 ±4.0 LSB  
Note 1. Channel-dedicated sample-and-hold circuits in use; The conversion time is the sum of the sampling time of channel-dedicated
sample-and-hold circuits, the hold mode switching time, the sampling time and the successive approximation time. Each of the
above state is indicated for the test conditions.
Channel-dedicated sample-and-hold circuits not in use; The conversion time is the sum of the sampling time and the successive
approximation time. Each of the above state is indicated for the test conditions.
Note 2. These channels cannot be used with Channel-dedicated sample-and-hold circuits.
Table 2.36
A/D internal reference voltage characteristics
Parameter
Min
Typ
Max
Unit
Test conditions
A/D internal reference voltage
1.13
1.18
1.23
V
Sampling time
4.15
—
—
µs
Table 2.37
A/D conversion characteristics of D/A output
Parameter
Min
Typ
Max
Unit
Test conditions
Sampling time
1
—
—
µs
RA6T2 Datasheet
2. Electrical Characteristics
R01DS0400EJ0120 Rev.1.20
Mar 31, 2022
Page 61 of 93



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