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LMK6C Datasheet(PDF) 15 Page - Texas Instruments |
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LMK6C Datasheet(HTML) 15 Page - Texas Instruments |
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15 / 45 page ![]() 9.3.4 Clock Output Interfacing and Termination These figures show the recommended output interfacing and termination circuits. LMK6C Device LVCMOS Receiver Figure 9-1. LMK6C Output to LVCMOS Receiver 100 LMK6D Device LVDS Receiver Figure 9-2. LMK6D Output DC-Coupled to LVDS Receiver With Internal Termination/Biasing LMK6P Device LVPECL Receiver Vdd R1 R1 R2 R2 Figure 9-3. LMK6P Output DC-Coupled to LVPECL Receiver With External Termination/Biasing (T-Network) Table 9-1. LMK6P T-Network DC-Coupled Resistor Values SUPPLY (V) R1 (Ω) R2 (Ω) 3.3 133 82 2.5 250 62.5 1.8 450 56.5 www.ti.com LMK6C SNAS826A – APRIL 2022 – REVISED JULY 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 15 Product Folder Links: LMK6C |
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