LM4869 datasheet(15/20 Pages) NSC

15 / 20 page

Application Information (Continued)

BRIDGE CONFIGURATION EXPLANATION

As shown in Figure 1, each of the LM4869’s stereo channels

consists of two operational amplifiers. The LM4869 can be

used to drive a speaker connected between the two outputs

of each channel’s amplifiers.

Figure 1 shows that the output of Amp1 serves as the input

to Amp2, which results in both amplifiers producing signals

identical in magnitude, but 180˚ out of phase. Taking advan-

tage of this phase difference, a load is placed between

OUT+ and OUT- and driven differentially (commonly referred

to as ’bridge mode’). This results in a differential gain of

VD = 2(RF/RI)

(1)

Bridge mode is different from single-ended amplifiers that

drive loads connected between a single amplifier’s output

and ground. For a given supply voltage, bridge mode has a

distinct advantage over the single-ended configuration: its

differential output doubles the voltage swing across the load.

This results in four times the output power when compared

to a single-ended amplifier under the same conditions. This

increase in attainable output assumes that the amplifier is

not current limited or the output signal is not clipped. To

ensure minimum output signal clipping when selecting one

of the amplifier’s four closed-loop gains, refer to the Audio

Power Amplifier Design section.

Another advantage of the differential bridge output is no net

DC voltage across the load. This results from biasing OUT+

and OUT- at half-supply. This eliminates the coupling capaci-

tor that single supply, single-ended amplifiers require. Elimi-

nating an output coupling capacitor in a single-ended con-

figuration forces a single supply amplifier’s half-supply bias

voltage across the load. The current flow created by the

half-supply bias voltage increases internal IC power dissipa-

tion and may permanently damage loads such as speakers.

POWER DISSIPATION

Power dissipation is a major concern when designing a

successful bridged or single-ended amplifier. Equation (2)

states the maximum power dissipation point for a single-

ended amplifier operating at a given supply voltage and

driving a specified output load.

DMAX =(VDD)

2/(2

π2R

Single-Ended

(2)

However, a direct consequence of the increased power de-

livered to the load by a bridge amplifier is an increase in the

internal power dissipation point for a bridge amplifier oper-

ating at the same given conditions.

DMAX =4 * (VDD)

2/(2

π2R

Bridge Mode

(3)

The LM4869 has four operational amplifiers in one package

and the maximum internal power dissipation is four times

that of a single-ended amplifier. From Equation (3), assum-

ing a 5V power supply and an 8

Ω load, the maximum power

dissipation point is 2W. The maximum power dissipation

point obtained from Equation (3) must not exceed the power

dissipation predicted by Equation (4):

DMAX =(TJMAX −TA)/

(4)

For the exposed DAP TSSOP package,

JA=

41˚C/W.

JAMAX = 150˚C for the LM4869. For a given ambient tem-

perature T

A, Equation (4) can be used to find the maximum

internal power dissipation supported by the IC packaging. If

the result of Equation (3) is greater than that of Equation (4),

decrease the supply voltage, increase the load impedance,

or reduce the ambient temperature. For a typical application

with a 5V power supply and an 8

Ω load, the maximum

ambient temperature that does not violate the maximum

junction temperature is approximately 68˚C. This further as-

sumes that a device is a surface mount part operating

around the maximum power dissipation point. Since internal

power dissipation is a function of output power, higher am-

bient temperatures are allowed as output power decreases.

Refer to the Typical Performance Characteristics curves for

power dissipation information at lower output power levels.

BTL GAIN SELECTION

The LM4869 features four fixed, internally set, BTL voltage

gains: 6dB, 10dB, 15.6dB, and 21.6dB. Select one of the

four gains by applying a logic level signal to the GAIN0

(MSB) and GAIN1 (LSB) digital inputs.

The closed-loop gain of the first amplifier is adjustable, hav-

ing four different gains, whereas two internal 20k

Ω resistors

set the second amplifier’s gain at -1. Table 1 below, shows

the state of the two logic inputs required to select one of the

four gain values.

GAIN 0

GAIN 1

Selected Gain (dB)

15.6

21.6

POWER SUPPLY BYPASSING

As with any power amplifier, proper supply bypassing is

critical for low noise performance and high power supply

rejection. The capacitors connected to the bypass and power

supply pins should be placed as close to the LM4869 as

possible. The capacitor connected between the bypass pin

and ground improves the internal bias voltage’s stability,

producing improved PSRR. The improvements to PSRR

increase as the bypass pin capacitor value increases.

Typical applications employ a 5V regulator with 10µF and a

0.1µF filter capacitors that aid in supply stability. Their pres-

ence, however, does not eliminate the need for bypassing

the LM4869’s supply pins. The selection of bypass capacitor

values, especially C

B, depends on desired PSRR require-

ments, click and pop performance (as explained in theSe-

lecting External Components section), system cost, and

size constraints.

MICRO-POWER SHUTDOWN

The LM4869 features an active-low micro-power shutdown

mode. The voltage applied to the SHUTDOWN pin controls

the LM4869’s shutdown function. Activate micro-power shut-

down by applying 0V to the SHUTDOWN pin. The logic

threshold is typically 0.4V for a logic low and 1.5V for a logic

high. When active, the LM4869’s micro-power shutdown

feature turns off the amplifier’s bias circuitry, disables the

internal V

DD/2 generator, and forces the amplifier outputs

into a high impedance state. The result is greatly reduced

power supply current. The low 0.1µA typical shutdown cur-

rent is achieved by applying a voltage to the SHUTDOWN

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