2

PS8551

07/31/01

PI74AVC+16268

12-Bit to 24-Bit Registered Bus

Exchanger w/3-State Outputs

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s

t

u

p

n

Is

t

u

p

t

u

O

1

A

N

E

K

L

C2

A

N

E

K

L

CK

L

CA

B

1B

2

HH

X

X

B

(

B

(

LL

↑

(

X

LL

↑

(

X

XL

↑

LX

L

XL

↑

HX

H

s

t

u

p

n

Is

t

u

p

t

u

O

K

L

CA

E

OB

E

OA

B

2

,

B

1

—H

H

Z

Z

—H

L

Z

e

v

it

c

A

—L

H

e

v

it

c

AZ

—L

L

e

v

it

c

Ae

v

it

c

A

PinDescription

PinConfiguration

Notes:

1. H = High Signal Level, L = Low Signal Level, X = Irrelevant,

Z = High Impedance, ↑ = Transition, Low to High

2. Two CLK edges are needed to propagate data

3. Output level before indicated steady state input conditions

were established.

AtoBSTORAGE(OEB=L)

BtoASTORAGE(OEA=L)

OutputEnable

s

t

u

p

n

I

s

t

u

p

t

u

O

A

B

1

N

E

K

L

CB

2

N

E

K

L

CK

L

CL

E

SB

1B

2

HX

X

H

X

X

0

(

XH

X

L

X

X

0

(

LX

↑

HL

X

L

LX

↑

HH

X

H

XL

↑

LX

L

L

XL

↑

LX

H

H

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

56

55

54

53

52

51

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

25

26

27

28

32

31

30

29

CLKEN2B

CLKENA1

1B3

1B4

GND

GND

1B2

1B5

1B1

1B6

VCC

VCC

A12

1B7

A11

1B8

A10

1B9

GND

GND

A9

1B10

A8

1B11

A7

1B12

A6

2B12

A5

2B11

A4

2B10

GND

GND

A3

2B9

A2

2B8

A1

2B7

VCC

VCC

2B1

2B6

2B2

2B5

2B3

2B4

GND

GND

CLKEN1B

CLKENA2

OEA

OEB

SEL

CLK

56-Pin

A,K

e

m

a

N

n

i

Pn

o

it

p

i

r

c

s

e

D

E

O)

W

O

L

e

v

it

c

A

(

t

u

p

n

I

el

b

a

n

E

t

u

p

t

u

O

K

L

Ck

c

o

l

C

L

E

S)

w

o

L

e

v

it

c

A

(

t

c

el

e

S

N

E

K

L

C)

w

o

L

e

v

it

c

A

(

el

b

a

n

E

k

c

o

l

C

B

2

,

B

1

,

Ast

u

p

t

u

O

e

t

a

t

S

-

3

D

N

Gd

n

u

o

r

G

C

r

e

w

o

P