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L9396 Datasheet(PDF) 17 Page - STMicroelectronics |
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L9396 Datasheet(HTML) 17 Page - STMicroelectronics |
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17 / 109 page  DS12539 Rev 6 17/109 L9396 Overall description 108 BCKSW, SCORE - -1 19 V VC4 - VBST-0.6 VBST+10 V VC2, CP - VBST-0.3 VBST+10 V VC1, VC3 - -0.1 19 V CBS, GCORE - -0.1 SCORE+8 V VCC5, VCC, VCOREFDBK, VCORE - -0.1 5.5 V VCCSEL, IGN - -0.1 19 V GNDA, GNDD, GNDBST, NU --0.1 0.1 V Interfaces VDBATT, PDBATT - -0.1 19 V VDG IC in sleep mode (IGN low) -0.3 VDS+10 V IC in operative mode (IGN high) -7 VDS+10 V PDG IC in sleep mode (IGN low) -0.3 PDS+10 V IC in operative mode (IGN high) -7 PDS+10 V PRG IC in sleep mode (IGN low) -0.3 PRS+10 V IC in operative mode (IGN high) -7 PRS+10 V VDS, PDS, PRS IC in sleep mode (IGN low) -0.3 19 V IC in operative mode (IGN high) -7 19 V WDTDIS - -0.1 5.5 V AI[0..4] - -0.1 19 V FSN, FAULT, PRN, RESET, WSO[0..3] - -0.1 5.5 V CS, CLK, SDI, SDO, PRI, PDI - -0.1 5.5 V RSUH/L[0..3], GPOD0 - -0.1 19 V Table 4. Pin operating range (continued) Pin name Condition Min Max Unit |
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