73S8024C datasheet(13/22 Pages) TERIDIAN

13 / 22 page

DS_8024C_023

73S8024C Data Sheet

Rev. 1.3

12 Typical Application Schematic

22pF

See NOTE 5

RSTIN_f rom_uC

CMDVCC_f rom_uC

100nF

5V/3V_select_f rom_uC

AUX1UC_to.f rom_uC

AUX2UC_to/f rom_uC

SO28

See NOTE 1

See NOTE 4

CLK track should be routed

far from RST, I/O, C4 and

C8.

Low ESR (<100mohms) C1

should be placed near the SC

connecter contact

See NOTE 2

External_clock_f rom uC

See NOTE 3

- OR -

VDD

20K

See NOTE 6

Card detection

switch is

normally

closed.

NDS & ISO7816=1uF, EMV=3.3uF

10uH

Rext1

See

note 7

CLKDIV2_f rom_uC

CLKDIV1_f rom_uC

See note 8

VDD

See

NOTE 1

Rext2

VDD

NOTES:

1) VDD supply must be =2.7V to 3.6V DC.

2) Optional, can be left open

3) Required if external clock from uP is used.

4) Required if crystal is used.

Y1, C2 and C3 must be removed if external clock is used.

5) Pin can not float. Must be driven or connected to GND

if power down function is not used.

6)Internal pull-up allows it to be left open if unused.

7) Rext1 and Rext2 are external resistors to ground and

Vdd to modify the VDDfault voltage. Can be left open

8) Keep L1 close to pin 5

OFF_interrupt_to_uC

VDD

IOUC_to/f rom_uC

PWRDN_f rom_uC

CRY STAL

Smart Card Connector

73S8024C

CLKDIV1

CLKDIV2

5V3V_

GND

LIN

VDD

AUX2

PWRDN

PRESB

PRES

I/O

AUX1

GND

CLK

RST

VCC

VDD_ADJ

CMDVCC_

RSTIN

VDD

GND

OFF_

AUX2UC

AUX1UC

XTALOUT

XTALIN

I/OUC

100nF

10uF

Figure 9: 73S8024C Typical Application Schematic

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