CS47L63 datasheet(21/300 Pages) CIRRUS

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DS1085F3

CS47L35

3 Characteristics and Specifications

Table 3-19. Control Interface Timing—Two-Wire (I2C) Mode

The following timing information is valid across the full range of recommended operating conditions.

Parameter 1

1.Control interface

timing—I2C Mode

Symbol

Min

Typ

Max

Units

SCLK Frequency

—

3400

kHz

SCLK Low Pulse-Width

160

—

SCLK High Pulse-Width

100

—

Hold Time (Start Condition)

160

—

Setup Time (Start Condition)

160

—

SDA, SCLK Rise Time (10%–90%)

SCLK frequency > 1.7MHz

SCLK frequency > 1MHz

SCLK frequency

 1MHz

—

160

2000

SDA, SCLK Fall Time (90%–10%)

SCLK frequency > 1.7MHz

SCLK frequency > 1MHz

SCLK frequency

 1MHz

—

160

200

Setup Time (Stop Condition)

160

—

SDA Setup Time (data input)

—

SDA Hold Time (data input)

0—

—

SDA Valid Time (data/ACK output)

SCLK slew (90%–10%) = 20ns, CLOAD (SDA) = 15 pF

SCLK slew (90%–10%) = 60ns, CLOAD (SDA) = 100 pF

SCLK slew (90%–10%) = 160ns, CLOAD (SDA) = 400 pF

SCLK slew (90%–10%) = 200ns, CLOAD (SDA) = 550 pF

t10

—

130

190

220

Pulse width of spikes that are suppressed

tps

—

SCLK

(input)

SDA

START

STOP

t10

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