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PCA9512A_1
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 7 October 2005
13 of 22
Philips Semiconductors
PCA9512A
Level shifting hot swappable I2C-bus and SMBus bus buffer
[1]
This specification applies over the full operating temperature range.
[2]
Card side supply voltage.
[3]
The enable time is from power-up of VCC and VCC2 ≥ 2.7 V to when idle or stop time begins.
[4]
Idle time is from when SDAn and SCLn are HIGH after enable time has been met.
[5]
Itrt(pu) varies with temperature and VCC voltage, as shown in Section 11.1 “Typical performance characteristics”.
[6]
The connection circuitry always regulates its output to a higher voltage than its input. The magnitude of this offset voltage as a function
of the pull-up resistor and VCC voltage is shown in Section 11.1 “Typical performance characteristics”.
[7]
Guaranteed by design, not production tested.
[8]
Cb = total capacitance of one bus line in pF.
System characteristics
fSCL
SCL clock frequency
[7] 0
-
400
kHz
tBUF
bus free time between
STOP condition and
START condition
[7] 1.3
-
-
µs
tHD;STA
START condition hold
time
[7] 0.6
-
-
µs
tSU;STA
START condition (or
repeated START
condition) set-up time
[7] 0.6
-
-
µs
tSU;STO
STOP condition set-up
time
[7] 0.6
-
-
µs
tHD;DAT
data hold time
[7] 300
-
-
ns
tSU;DAT
data set-up time
[7] 100
-
-
ns
tLOW
SCL LOW time
[7] 1.3
-
-
µs
tHIGH
SCL HIGH time
[7] 0.6
-
-
µs
tf
fall time SDA and SCL
[7] [8] 20 + 0.1
× Cb -
300
ns
tr
rise time SDA and SCL
[7] [8] 20 + 0.1
× Cb -
300
ns
Table 5:
Characteristics …continued
VCC = 2.7 V to 5.5 V; Tamb = −40 °C to +85 °C; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
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