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LP3942 Datasheet(PDF) 17 Page - National Semiconductor (TI) |
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LP3942 Datasheet(HTML) 17 Page - National Semiconductor (TI) |
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17 / 20 page ![]() Charge Pump Operational Description OVERVIEW The LP3942 includes a regulated switched-capacitor charge pump with two programmable voltage multiplications, 1.5 and 2. On 1.5x mode by combining the principles of a switched- capacitor charge pump and a linear regulator, it generates a regulated 4.5V output from Li-Ion input voltage range. A two-phase internally generated non-overlapping clock con- trols the operation of the charge pump. During the charge phase (ø1), both flying capacitors (C1 and C2) are charged from input voltage. In the pump phase that follows (ø2), the flying capacitors are discharged to output. A traditional switched capacitor charge pump operating in this manner will use switches with very low on-resistance, ideally 0 Ω,to generate an output voltage that is 1.5x the input voltage. The LP3942 regulates the output voltage by controlling the resis- tance of the input-connected pass-transistor switches in the charge pump. On 2x mode the output is regulated to 5.0V thus enabling the higher output voltage for driving parallel connected RGBs with lower current variation on RGB switch mode. PRE-REGULATION The low input current ripple of the LP3942, resulting from internal pre-regulation, adds very little noise to the input line. Regulation is achieved by modulating the on-resistance of the switches connected to the input pin. The regulation is done before the voltage multiplication, giving rise to the term “pre-regulation”. It is pre-regulation that eliminates most of the input current ripple that is a typical and undesirable characteristic of a many switched capacitor converters. V DD is used as the regulator reference voltage. Any change in V DD value is reflected to VOUT. INPUT, OUTPUT, AND GROUND CONNECTIONS Making good input, output, and ground connections is es- sential to achieve optimal LP3942 performance. It is strongly recommended that the input capacitor (C IN) be placed as close as possible to the LP3942, so that the trace from the input pin (V IN) is as short and straight as possible. It is recommended that the input capacitor (C IN) is placed on the same side of the PCB as LP3942, and that traces remain on this side of the board as well (vias to traces on other PCB layers are not recommended between the input capacitor and LP3942 input pad). It is recommended that the output capacitor (C OUT) be placed as close to the LP3942 output pad (P OUT) as possible. It is best if routing of output pad trace follows guidelines similar to those presented for the input pad (V IN) and capacitor (CIN). The flying capacitors (C1 and C2) should also be placed as close to the LP3942 as possible to minimize PCB trace length between the capacitor and the IC. The following pads of the LP3942 are ground connections and must be connected externally: pads GND1, GND2, GND3 and the die-attach pad (DAP). Large, low impedance copper fills and via connections to an internal ground plane are the preferred way of connecting together the ground pads of the LP3942, the input capacitor, and the output capacitor, as well as connecting this circuit ground to the system ground of the PCB. RESET AND STANDBY When the voltage on the NRST pin is high, the LP3942 will be in reset mode. After NRST goes low, the LP3942 goes to default mode, which is Standby. All internal registers in LP3942 are set to default state in reset mode. There is a 1 M Ω pull-down resistor tied between the NRST pin and ground that pulls the NRST pin voltage low if the pin is not driven by a voltage source. When pulling the part out of reset mode, the voltage source connected to the NRST pin must be able to drive the current required by the 1 M Ω resistor. SOFT START The LP3942 employs soft start circuitry to prevent excessive input inrush currents during startup. The output voltage is programmed to rise from 0V to the nominal output voltage (4.5V or 5.0V) in 200 µs (typ). Soft-start is engaged after the specified start-up delay (0.8 ms typically) after a part, with input voltage established, is taken out of standby by writing NSTBY and CP_ON bits to ‘1’. Start-up delay and soft-start will also engage always when CP_ON bit is written to ‘1’ or when device recovers from thermal shutdown mode. OUTPUT CURRENT CAPABILITY In 1.5x mode the LP3942 is guaranteed to provide 120 mA of output current at specified output voltage when the input voltage is within 3.4V-to-5.0V. LP3942 can provide 120 mA current also from lower input voltage (down to 3.0V) but then output voltage will be degraded due to effective output resis- tance (R OUT) of the charge pump. The expected voltage drop can be calculated by using a simple model for the charge pump depicted in Figure 1. The model shows a linear pre-regulation block (Reg), a voltage multiplier (1.5x), and an output resistance (R OUT). Output resistance models the output voltage droop that is inherent to switched capacitor converters. The output resis- tance of the LP3942 is 5 Ω (typ), and is function of switching frequency, flying capacitors, internal resistances of switches and ESR of capacitors. When the output voltage is in regu- lation, the regulator in the model controls the voltage V’ to keep the output voltage equal to 4.5V (typ). With increased output current, the voltage drop across R OUT increases. To prevent droop in output voltage, the voltage drop across the regulator is reduced, V’ increases, and V OUT remains at 4.5V. When the output current increases to the point that there is zero voltage drop across the regulator, V’ equals the input voltage, and the output voltage is “on the edge” of regulation. Additional output current causes the output volt- age to fall out of regulation, and the LP3942 operation is similar to a basic open-loop 1.5x charge pump. In this mode, output current results in output voltage drop proportional to the output resistance of the charge pump. The out-of- 20129215 FIGURE 1. Charge Pump Output Resistance Model www.national.com 17 |
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