APR349

Document number: DS43554 Rev. 2 - 2

6 of 10

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July 2021

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APR349

Operation Description (continued)

GATE Voltage Regulation/Auto-Tracking

The minimum on-time (tON_MIN) blanking period aims to prevent an accidental turn-off due to interference of ringing noise voltage. When the

controlled MOSFET gate turns on, some ringing noise will be generated. Utilizing the minimum on-time timer to blank the VTHOFF comparator, this

keeps the SR MOSFET on for at least the minimum on-time. The gate driver can be pulled down quickly to zero when VDRAIN ringing voltage goes

over 2V during this period.

Once the synchronous rectification gate outputs a high-level voltage, the secondary-side current goes through the synchronous rectification

MOSFET. The voltage drop on the MOSFET is calculated by RDS(ON) × secondary-side current. After minimum turn-on time tON_MIN, the IC

continuously monitors VDRAIN by the DRAIN pin and generates a pull-down current from the MOSFET gate until drain voltage equals -40mV. As

shown in Figure 2, the MOSFET drain-to-source voltage would remain around -40mV (VON_REG) with the secondary-side current decreasing.

VDET

t

t

VGATE

VON_REG

VON_TH

2V

Forward Regulation

Period

tDON

tON_MIN

0

0

Figure 2. Forward Regulation Operation Principle