©2022 Renesas Electronics Corporation

Rev 1.02

000-00055583-102

Revised February 8, 2022

USB Host Charger Identification

Analog Switches

SLG55583

SLG55583A

Block Diagram

General Description

The SLG55583/SLG55583A is a USB device that combines

high speed USB switches with a USB host charger (dedicated

charger) identification circuit. The device supports both the

latest USB Battery Charging Specification Revision 1.2

including data contact detection and a set resistor bias for

Apple compliant devices as well as legacy USB D+/D- short

detection using data line pull-up.

The SLG55583/SLG55583A can also support CDP mode

(FAST charging and data communication available mode if

smartphone can support CDP mode.)

The SLG55583/SLG55583A can also support low speed / full

speed mouse/keyboard wake-up from S3 mode.

Features

•

High Speed USB Switching

•

Low 4.0 pF (typ) On Capacitance

•

Low 4.0

Ω (typ) On Resistance

•

Low 0.5

Ω (typ) On Resistance Flatness

•

4.5 V to 5.5 V Supply Range

•

Low Supply Current

•

Automatic Current-Limit Switch Control

•

Automatic USB Charger Identification Circuit

•

CDP Support (active USB 2.0 data communication with

1.5 A charging)

•

Apple IPAD2 @ 2 A charging current support

•

Automatic CDP/SDP mode support with SMART-CDP=1

for "Always Data Communication"

•

Pb-Free / RoHS Compliant

•

Halogen-Free

•

TDFN-8 Package

Pin Configuration - SLG55583

Pin Configuration - SLG55583A

VDD

SMART-CDP

TDP

TDM

CB

DP

DM

CEN#

2

3

4

5

6

7

8

1

Thermal Pad

connected to GND

TDFN-8

(Top View)

VDD

SMART-CDP

TDP

TDM

CB

DP

DM

CEN

2

3

4

5

6

7

8

1

Thermal Pad

connected to GND

TDFN-8

(Top View)

FSM Logic

One Shot

+

-

VREF1

+

-

VREF1

CEN#

or CEN

CB

DM

DP

+

-

VREF2

FET

VDD

TDP

TDM

Resistor

Divider

Resistor

Divider

SMART-CDP