LMK6P datasheet(12/51 Pages) TI

12 / 51 page

Over Recommended Operating Conditions, Typical Temp = 25°C, Frequency output = 156.25 MHz, VDD = 3.3 V, LVCMOS

Output Capacitor load = 2.2 pF (unless otherwise specified)(4)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

RJITT,PK-

Peak-peak Period Jitter

Fout ≥ 25 MHz

LVDS - Clock Output Jitter

RMS Jitter ( Integration BW: 12 kHz to 20

MHz)

Fout = 156.25 MHz

100

125

PN1k

Phase Noise at 1 kHz Offset

Fout = 156.25 MHz

- 95

dBc/Hz

PN10k

Phase Noise at 10 kHz Offset

-128

dBc/Hz

PN100k

Phase Noise at 100 kHz Offset

- 146

dBc/Hz

PN1M

Phase Noise at 1 MHz Offset

- 156

dBc/Hz

PN10M

Phase Noise at 10 MHz Offset

- 156.5

dBc/Hz

RMS Jitter (Integration BW: 12 kHz to 20

MHz)

Fout = 312.5 MHz

100

125

PN1k

Phase Noise at 1 kHz Offset

Fout = 312.5 MHz.

-89

dBc/Hz

PN10k

Phase Noise at 10 kHz Offset

-122

dBc/Hz

PN100k

Phase Noise at 100 kHz Offset

-139

dBc/Hz

PN1M

Phase Noise at 1 MHz Offset

-150

dBc/Hz

PN10M

Phase Noise at 10 MHz Offset

-153.5

dBc/Hz

RMS Jitter (Integration BW: 12 kHz to 20

MHz)

Fout = 100 MHz

140

170

Fout = 125 MHz

110

125

Fout = 155.52 MHz

105

140

Fout = 161.1328125 MHz

125

160

Fout = 200 MHz

125

150

Fout = 400 MHz

100

135

RPeriodJITT

,RMS

RMS Period Jitter

Fout ≥ 25 MHz

1.6

RJITT,PK-

Peak-peak Period Jitter

Fout ≥ 25 MHz

LMK6C, LMK6D, LMK6H, LMK6P

SNAS826C – APRIL 2022 – REVISED DECEMBER 2022

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