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USB-CTR Datasheet(PDF) 2 Page - List of Unclassifed Manufacturers |
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USB-CTR Datasheet(HTML) 2 Page - List of Unclassifed Manufacturers |
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2 / 8 page ![]() Measurement Computing (508) 946-5100 2 info@mccdaq.com mccdaq.com USB-CTR Series Features Counter Input Modes USB-CTR Series devices support the following counter input modes: • totalize mode (event counter) • period measurement mode • pulse-width measurement mode • timing measurement mode Counter input modes are software-selectable. Some modes include the max limit and the min limit register values, which do not directly affect the current count, but set limits in some modes to determine counter behavior. Each mode supports additional counter options. Totalize Mode In totalize mode, a USB-CTR Series device functions as a high speed pulse event counter for general counting applications. Each counter can be set to any resolution up to 64-bits based on the software-selectable max limit and min limit register values. The counters can accept frequency inputs up to 48 MHz. The counter input connector ( CxIN) is used as the primary counter input, and the counter gate connector ( CxGT) can be used to perform one of the following functions: • set the count direction • gate the counter • clear/reload the counter with the min limit value • trigger a particular counter to begin counting. The following totalize measurement mode options are software- selectable: Clear on Read: The counter is cleared after each read (synchro- nous or asynchronous). The value of the counter before it was cleared is latched and returned. It is typically cleared to zero, but depending on counting mode, it may be cleared to the value stored in the min limit register. Range Limit: Set max limit and min limit register values to mimic limit switches in a mechanical counter. • When counting up, the counter freezes or rolls over to the min limit count whenever the count reaches the max limit register value. • When counting down, the counter freezes or rolls over to the max limit count whenever the count reaches the min limit register value. Counter Inputs 0-3 USB Port FPGA Microcontroller with USB 2.0 High-Speed Interface D+/D- Clock Output 8-Bit Data Bus 16-Bit FIFO Bus Power Supplies VBUS (5 V) Power Control 3.3 V Always On Counter Outputs 0-3 Counter Gates 0-3 Trigger Input Clock Output External Clock Input DIO 0-7 DIO Protection Counter Inputs 4-7 Counter Outputs 4-7 Counter Gates 4-7 Timer Outputs 0-3 +VO 3.3 V 5 V 1.2 V USB-CTR08 only USB-CTR Series Block Diagram |
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