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TMDS Receiver
CS5823
BLOCK DIAGRAM
GENERAL DESCRIPTION
FEATURES
Myson-Century Technology
USA:
4020 Moorpark Avenue Suite 115
San Jose, CA, 95117
Tel: 408-243-8388 Fax: 408-243-3188
Sales@myson.com.tw
www.myson.com.tw
www.century-semi.com
Rev. 0.9 March 2002
page 1 of 4
Myson-Century Technology, Inc.
Taiwan:
No. 2, Industry East Rd. III,
Science-Based Industrial Park, Hsin-Chu, Taiwan
Tel: 886-3-5784866 Fax: 886-3-5784349
The CS5823 supports displays ranging from VGA
to UXGA (25-165 MHz) for desktop and special
applications. It also supports up to true color panels
(24 bit/pixel, 16.7M colors) in 1 or 2 pixels/clock
mode.
• Scalable Bandwidth: 25-165 MHz (VGA to UXGA)
• one full input clock cycle skew tolerance
• Time staggered data output for reduced ground
bounce
• Over 5m twisted-pair cable distance support
• Compliant with DVI 1.0
• 3.3V low power operation with power-down func-
tion
T
Termination
Control
VCR
Data Recovery
CH2
VCR
VCR
VCR
Data Recovery
CH1
Data Recovery
CH0
PLL
SYNC2
SYNC
Channel
Decoder
Panel
Interface
Logic
SYNC1
SYNC0
SYNC2
SYNC1
SYNC0
DATA
CTL3
VSYNC
CTL2
CTL1
DATA
DATA
HSYNC
QE[23:0]
QO[23:0]
ODCK
DE
HSYNC
VSYNC
SCDT
CTL1
CTL2
CTL3
24
24
EXT-RES
RX2+
RX2-
RX1+
RX1-
RX0+
RX0-
RXC+
RXC-
PIXS
DFO
OCK_INV
PDO
STAGN
ST
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