MCT8317A datasheet(109/161 Pages) TI1

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8.7.1.17 REF_PROFILES6 Register (Offset = A4h) [Reset = X]

REF_PROFILES6 is shown in Figure 8-65 and described in Table 8-27.

Return to the Table 8-9.

Figure 8-65. REF_PROFILES6 Register

PARITY

REF_OFF2

R/W-0h

R/W-X

REF_OFF2

REF_CLAMP2

R/W-X

REF_CLAMP2

RESERVED

R/W-X

RESERVED

R/W-X

Table 8-27. REF_PROFILES6 Register Field Descriptions

Bit

Field

Type

Reset

Description

PARITY

R/W

Parity bit

30-23

REF_OFF2

R/W

Turn off REF Configuration Turn off REF % = {(REF_OFF2/255)*100}

22-15

REF_CLAMP2

R/W

Clamp REF Configuration Clamp REF % =

{(REF_CLAMP2/255)*100}

14-0

RESERVED

R/W

Reserved

8.7.2 Fault_Configuration Registers

Table 8-28 lists the memory-mapped registers for the Fault_Configuration registers. All register offset addresses

not listed in Table 8-28 should be considered as reserved locations and the register contents should not be

modified.

Table 8-28. FAULT_CONFIGURATION Registers

Offset

Acronym

Section

92h

FAULT_CONFIG1

Fault configuration 1

Section 8.7.2.1

94h

FAULT_CONFIG2

Fault configuration 2

Section 8.7.2.2

Complex bit access types are encoded to fit into small table cells. Table 8-29 shows the codes that are used for

access types in this section.

Table 8-29. Fault_Configuration Access Type Codes

Access Type

Code

Description

Read Type

Read

Write Type

Write

Reset or Default Value

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MCT8317A

SLLSFQ2 – JANUARY 2023

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