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MCT8317A Datasheet(PDF) 129 Page - Texas Instruments |
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MCT8317A Datasheet(HTML) 129 Page - Texas Instruments |
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129 / 161 page  Table 8-44. CONTROLLER_FAULT_STATUS Register Field Descriptions (continued) Bit Field Type Reset Description 18 LOCK_ILIMIT R 0h Indicates lock detection current limit fault 0h = No lock current limit fault detected 1h = Lock current limit fault detected 17 MTR_UNDER_VOLTAGE R 0h Indicates motor undervoltage fault 0h = No motor undervoltage detected 1h = Motor undervoltage detected 16 MTR_OVER_VOLTAGE R 0h Indicates motor overvoltage fault 0h = No motor overvoltage detected 1h = Motor overvoltage detected 15 EXT_WD_TIMEOUT R 0h Indicates external watchdog timeout fault 0h = No external watchdog timeout fault detected 1h = External watchdog timeout fault detected 14-3 RESERVED R 0h Reserved 2 STL_EN R 0h Indicates STL is enabled in EEPROM 0h = STL Disable 1h = STL Enable 1 STL_STATUS R 0h Indicates STL success criteria Pass = 1b; Fail = 0b 0h = STL Fail 1h = STL Pass 0 APP_RESET R 0h App reset 0h = App Reset Fail 1h = App Reset Successful 8.8.2 System_Status Registers Table 8-45 lists the memory-mapped registers for the System_Status registers. All register offset addresses not listed in Table 8-45 should be considered as reserved locations and the register contents should not be modified. Table 8-45. SYSTEM_STATUS Registers Offset Acronym Register Name Section E4h SYS_STATUS1 System Status Register1 Section 8.8.2.1 EAh SYS_STATUS2 System Status Register2 Section 8.8.2.2 ECh SYS_STATUS3 System Status Register3 Section 8.8.2.3 Complex bit access types are encoded to fit into small table cells. Table 8-46 shows the codes that are used for access types in this section. Table 8-46. System_Status Access Type Codes Access Type Code Description Read Type R R Read Reset or Default Value -n Value after reset or the default value www.ti.com MCT8317A SLLSFQ2 – JANUARY 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 129 Product Folder Links: MCT8317A |
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