
SSX35 Trusted platform module (TPM)
7
Table 4-1
Signal
Pin(s)
Type
Description
LAD[3:0]
26, 23, 20, 17
BI
Multiplexed Command, Address and
Data BUS
(see LPC Interface Spec)
LPCPD#
28
I
power down
LCLK
21
I
33MHz clock
(see LPC Interface Spec).
LFRAME#
22
I
Frame
indicates start of a new LPC
cycle, termination of broken cycle (see
LPC Interface Spec)
LRESET#
16
I
System reset signal
(see LPC Interface Spec)
SERIRQ
27
BI
Serialized IRQ
is used to handle interrupt
support (see LPC Interface Spec)
CLKRUN#/GPIO
15
BI
Same as PCI CLKRUN#. Active Low.
internal pull-down
GPIO will default to low.
PP
7
I,BI
Physical Presence, active high, internal
pull-down. Used to indicate Physical
Presence to the TPM.
DC
3,13,14
I
Do not connect
GPIO
1
BI
Defaults high. (weak internal pull-up)
GPIO
2
BI
Defaults high (weak internal pull-up)
GPIO6
6
BI
GPIO Defaults high (weak internal
pull-up)
TESTI
8
I
This pin will be pulled low on
motherboard. Assuming: Pull high to
enable Test mode. Pull low to disable
Test mode and enable GPIO on pin
9(TESTBI)
TESTBI/GPIO
9
BI
TESTBI: Test port. If TESTI is pulled low
acts as a GPIO.
GPIO will default high(weak internal
pull-up)
Power
3V
10, 19 24
I
This is a 3.3 volt DC power.
The maximum power for this interface is
250 ma.