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74F02 Datasheet(PDF) 2 Page - NXP Semiconductors

Part # 74F02
Description  Quad 2-input NOR gate
PDF  11 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74F02 Datasheet(HTML) 2 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
74F02
Quad 2-input NOR gate
2
1990 Oct 04
853-0326 00622
FEATURE
• Industrial temperature range available (–40°C to +85°C)
TYPE
TYPICAL
PROPAGATION
DELAY
TYPICAL SUPPLY
CURRENT
(TOTAL)
74F02
3.4ns
4.4mA
PIN CONFIGURATION
14
13
12
11
10
9
8
7
6
5
4
3
2
1
GND
VCC
D2b
D2a
Q2
D3a
Q3
D3b
D0a
D0b
Q1
Q0
D1a
D1b
SF00007
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
COMMERCIAL RANGE
VCC = 5V ±10%, Tamb = 0°C to +70°C
INDUSTRIAL RANGE
VCC = 5V ±10%, Tamb = –40°C to +85°C
PKG DWG #
14-pin plastic DIP
N74F02N
I74F02N
SOT27-1
14-pin plastic SO
N74F02D
I74F02D
SOT108-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74F (U.L.) HIGH/LOW
LOAD VALUE HIGH/LOW
Dna, Dnb
Data inputs
1.0/1.0
20
µA/0.6mA
Qn
Data output
50/33
1.0mA/20mA
NOTE:
One (1.0) FAST unit load is defined as: 20
µA in the high state and 0.6mA in the low state.
LOGIC DIAGRAM
D0a
D0b
D1a
D1b
D2a
Q0
D2b
D3a
D3b
Q1
Q2
Q3
VCC = Pin 14
GND = Pin 7
1
4
10
13
2
3
5
6
8
9
11
12
SF00008
FUNCTION TABLE
INPUTS
OUTPUT
Dna
Dnb
Qn
L
L
H
L
H
L
H
L
L
H
H
L
NOTES:
1
H = High voltage level
2
L = Low voltage level
LOGIC SYMBOL
D0a D0b D1a
D2a D2b D3a D3b
D1b
Q0 Q1 Q2 Q3
1
4
10 13
2
3
56
89
11
12
VCC = Pin 14
GND = Pin 7
SF00009
IEC/IEEE SYMBOL
2
3
5
6
8
9
11
12
1
4
10
13
SF00010
1



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