Philips Semiconductors

Product specification

74F139

1-of-4 decoder/demultiplexer

2

February 23, 1990

853–0344 98903

FEATURES

DESCRIPTION

The 74F139 is a high speed, dual 1-of-4 decoder/demultiplexer. This

device has two independent decoders, each accepting two binary

weighted inputs (A0n, A1n) and providing four mutually exclusive

active-Low outputs (Q0n–Q3n). Each decoder has an active-Low

Enable (E). When E is High, every output is forced High. The Enable

can be used as the Data input for a 1-of-4 demultiplexer application.

TYPE

TYPICAL

PROPAGATION

DELAY

TYPICAL

SUPPLY CURRENT

(TOTAL)

74F139

5.3ns

13mA

PIN CONFIGURATION

16

15

14

13

12

11

10

7

6

5

4

3

2

1

Q3a

Q0b

Q1b

Q2b

A1b

Eb

A0b

Ea

A0a

Q2a

A1a

Q0a

Q1a

9

8

GND

Q3b

SF00129

ORDERING INFORMATION

DESCRIPTION

COMMERCIAL RANGE

PKG DWG #

16-pin plastic DIP

N74F139N

SOT38-4

16-pin plastic SO

N74F139D

SOT109-1

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

PINS

DESCRIPTION

74F (U.L.) HIGH/LOW

LOAD VALUE HIGH/LOW

Ana, Anb

Address inputs

1.0/1.0

20

µA/0.6mA

Ea, Eb

Enable inputs (active Low)

1.0/1.0

20

µA/0.6mA

Q0n–Q3n

Data outputs (active Low)

50/33

1.0mA/20mA

NOTE: One (1.0) FAST unit load is defined as: 20

µA in the High state and 0.6mA in the Low state.

LOGIC SYMBOL

A0a

A1a

Ea

12

3

GND = Pin 8

SF00130

Q0a

Q1a Q2a

45

6

Q3a

7

A0b

A1b

Eb

15

14

13

Q0b

Q1b Q2b

12

11

10

Q3b

9

DECODER a

DECODER b

IEC/IEEE SYMBOL

SF00131

DEMUX

2

3

1

14

13

15

4

5

6

7

12

11

10

9

0

1

0

1

2

G

0

3

3