Philips Semiconductors FAST Products

Product specification

74F199

8-bit parallel-access shift register

June 15, 1988

2

LOGIC SYMBOL

Q0 Q1 Q2 Q3

4

6

8

10

GND = Pin 12

23

2

1

13

11

14

PE

J

K

CP

CE

MR

D1 D2

7

9

SF00153

D3

D0

3

5

Q5 Q6 Q7

15

17

19

21

D5 D6

20

22

D7

D4

16

18

Q4

IEEE/IEC SYMBOL

SF00154

1

9

16

18

20

22

1

3

5

7

2

14

23

13

11

1

&

C2/

→

SRG8

C3

R

2J

2K

2, 3D

2, 3D

10

15

17

19

21

4

6

8

FUNCTION TABLE

INPUTS

OUTPUTS

OPERATING MODES

MR

CP

CE

PE

J

K

Dn

Q0

Q1

…

Q6

Q7

OPERATING MODES

L

X

X

X

X

X

X

L

L

…

L

L

Reset (clear

H

↑

l

h

h

h

X

H

q0

…

q5

q6

Shift, set First stage

H

↑

l

h

l

l

X

L

q0

…

q5

q6

Shift, reset First stage

H

↑

l

h

h

l

X

q0

q0

…

q5

q6

Shift, toggle First stage

H

↑

l

h

l

h

X

q0

q0

…

q5

q6

Shift, retain First stage

H

↑

l

l

X

X

dn

d0

d1

…

d6

d7

Parallel load

H

↑

h

X

X

X

X

q0

q1

…

q6

q7

Hold (do nothing)

H

=

High voltage level

h

=

High voltage level one setup time prior to the Low-to-High clock transition

L

=

Low voltage level

l

=

Low voltage level one setup time prior t the Low-to-High clock transition

X

=

Don’t care

↑

=

Low-to-High clock transition

dn(qn) =

Lower case letters indicate the state of the referenced input (or output) one setup time prior to the Low-to-High clock transition