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74F20 Datasheet(PDF) 2 Page - NXP Semiconductors

Part # 74F20
Description  Dual 4-input NAND gate
PDF  8 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74F20 Datasheet(HTML) 2 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
74F20
Dual 4-input NAND gate
2
March 3, 1989
853–0332 95935
TYPE
TYPICAL
PROPAGATION
DELAY
TYPICAL
SUPPLY CURRENT
(TOTAL)
74F20
3.5ns
2.2mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
VCC = 5V ±10%,
Tamb = 0°C to +70°C
PKG DWG #
14-pin plastic DIP
N74F20N
SOT27-1
14-pin plastic SO
N74F20D
SOT108-1
PIN CONFIGURATION
14
13
12
11
10
9
8
7
6
5
4
3
2
1
GND
VCC
D1b
D1a
Q1
NC
D1d
D1c
D0a
D0b
Q0
NC
D0c
D0d
SF00065
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74F (U.L.) HIGH/LOW
LOAD VALUE HIGH/LOW
Dna, Dnb, Dnc, Dnd
Data inputs
1.0/1.0
20
µA/0.6mA
Q0, Q1
Data outputs
50/33
1.0mA/20mA
NOTE: One (1.0) FAST unit load is defined as: 20
µA in the High state and 0.6mA in the Low state.
LOGIC DIAGRAM
VCC = Pin 14
GND = Pin 7
SF00066
Q0
6
1
2
4
D0a
D0b
D0c
5
D0d
Q1
8
9
10
12
D1a
D1b
D1c
13
D1d
FUNCTION TABLE
INPUTS
OUTPUT
Dna
Dnb
Dnc
Dnd
Qn
L
X
X
X
H
X
L
X
X
H
X
X
L
X
H
X
X
X
L
H
H
H
H
H
L
NOTES:
H = High voltage level
L
= Low voltage level
X = Don’t care
LOGIC SYMBOL
D1a D1b
D0a D0b D0c
D1c D1d
D0d
Q0 Q1
68
12
4
5
9
10
12
13
VCC = Pin 14
GND = Pin 7
SF00067
IEC/IEEE SYMBOL
SF00068
&
6
8
1
2
4
5
9
10
12
13



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