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COP226C Datasheet(PDF) 16 Page - National Semiconductor (TI) |
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COP226C Datasheet(HTML) 16 Page - National Semiconductor (TI) |
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16 / 24 page ![]() Power Dissipation (Continued) If an IT instruction is executed the chip goes into the IDLE mode until the timer overflows In IDLE mode the current drain can be calculated from the following equation IcieIQaVc70cFi For example at 5 volts VCC and 400 kHz Icie120a5c70c04e260 mA The total average current will then be the weighted average of the operating current and the idle current Ita e ICO c To ToaTi a Ici c Ti ToaTi where Itaetotal average current ICOeoperating current Icieidle current Toeoperating time Tieidle time IO OPTIONS Outputs have the following optional configurations illustrat- ed in Figure 8 a Standard A CMOS push-pull buffer with an N-channel device to ground in conjunction with a P-channel device to VCC compatible with CMOS and LSTTL b Open Drain An N-channel device to ground only al- lowing external pull-up as required by the user’s applica- tion c Standard TRI-STATE L Output A CMOS output buffer similar to a which may be disabled by program control d Open-Drain TRI-STATE L Output This has the N-chan- nel device to ground only All inputs have the following option e Hi-Z input which must be driven by the users logic All output drivers use two common devices numbered 1 to 2 Minimum and maximum current (IOUT and VOUT) curves are given in Figure 9 for each of these devices to allow the designer to effectively use these IO configurations a Standard Push-Pull Output b Open-Drain Output TLDD8422 – 11 c Standard TRI-STATE ‘‘L’’ Output d Open Drain TRI-STATE ‘‘L’’ Output e Hi-Z Input FIGURE 8 InputOutput Configurations 16 |
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