COP245C datasheet(14/24 Pages) NSC

14 / 24 page

Instruction Set (Continued)

TABLE III COP244C245C Instruction Set

(Continued)

Machine

Mnemonic

Operand

Hex

Language

Data Flow

Skip

Description

Code

Conditions

(Binary)

INPUTOUTPUT INSTRUCTIONS

ING

0011 0011

None

Input G Ports to A

0010 1010

ININ

0011 0011

None

Input IN Inputs to A

0010 1000

(Note 2)

INIL

0011 0011

IL3 CKO‘‘0’’ IL0

None

Input IL Latches to A

0010 1001

(Note 3)

INL

0011 0011

L74

xRAM(B)

None

Input L Ports to RAMA

0010 1110

L30

OBD

0011 0011

None

Output Bd to D Outputs

0011 1110

OGI

0011 0011

None

Output to G Ports

0101

Immediate

OMG

0011 0011

RAM(B)

None

Output RAM to G Ports

0011 1010

XAS

0100 1111

SIO C

xSKL

None

Exchange A with SIO

(Note 3)

Note 1

All subscripts for alphabetical symbols indicate bit numbers unless explicitly defined (eg Br and Bd are explicitly defined) Bits are numbered 0 to N where

0 signifies the least significant bit (low-order right-most bit) For example A3 indicates the most significant (left-most) bit of the 4-bit A register

Note 2

The ININ instruction is not available on the 24-pin packages since these devices do not contain the IN inputs

Note 3

For additional information on the operation of the XAS JID LQID INIL and SKT instructions see below

Note 4

The JP instruction allows a jump while in subroutine pages 2 or 3 to any ROM location within the two-page boundary of pages 2 or 3 The JP instruction

otherwise permits a jump to a ROM location within the current 64-word page JP may not jump to the last word of a page

Note 5

A JSRP transfers program control to subroutine page 2 (0010 is loaded into the upper 4 bits of P) A JSRP may not be used when in pages 2 or 3 JSRP

may not jump to the last word in page 2

Note 6

LBI is a single-byte instruction if d e 0 9 10 11 12 13 14 or 15 The machine code for the lower 4 bits equals the binary value of the ‘‘d’’ data

minus 1

eg to load the lower four bits of B(Bd) with the value 9 (10012) the lower 4 bits of the LBI instruction equal 8 (10002) To load 0 the lower 4 bits of the LBI

instruction should equal 15 (11112)

Note 7

Machine code for operand field y for LEI instruction should equal the binary value to be latched into EN where a ‘‘1’’ or ‘‘0’’ in each bit of EN corresponds

with the selection or deselection of a particular function associated with each bit (See Functional Description EN Register)

Note 8

For 2K ROM devices A

Br (0

xA3) For 1K ROM devices A

Br (00

xA3 A2)

COP245C Datasheet(PDF) 14 Page - National Semiconductor (TI)

COP245C Datasheet(HTML) 14 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

Datasheet Download

Link URL