Philips Semiconductors

Product specification

74F524

8-bit register comparator (open collector + 3-State)

2

1990 Aug 07

853–0373 00135

FEATURES

‘less than’ outputs

DESCRIPTION

The 74F524 is an 8-bit bidirectional register with parallel input and

output, plus serial input and output progressing from MSB to LSB.

All data inputs, serial and parallel, are loaded by the rising edge of

the clock. The device functions are controlled by two control lines

(S0, S1) to execute shift, load, hold and read out. An 8-bit

comparator examines the data stored in the registers and on the

data bus. Three true-High, open collector outputs representing

‘register equal to bus’, ‘register greater than bus’ and ‘register less

than bus’ are provided. These outputs can be disabled to the OFF

state by the use of Status Enable (SE). A mode control has also

been provided to allow Two’s Complement as well as magnitude

compare. Linking inputs are provided for expansion to longer words.

PIN CONFIGURATION

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

S0

I/O0

I/O1

I/O2

I/O3

I/O4

I/O6

I/O7

GND

CP

M

LT

C/SO

C/SI

SE

S1

EQ

GT

I/O5

SF00970

TYPE

TYPICAL SUPPLY CURRENT

(TOTAL)

74F524

65MHz

110mA

ORDERING INFORMATION

DESCRIPTION

COMMERCIAL

RANGE

PKG DWG #

20-pin plastic DIP

N74F524N

SOT146-1

20-pin plastic SOL

N74F524D

SOT163-1

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

PINS

DESCRIPTION

74F(U.L.)

HIGH/LOW

LOAD VALUE

HIGH/LOW

I/On

Parallel data inputs

3.5/1.0

70

µA/0.6mA

S0, S1

Mode select inputs

1.0/1.0

20

µA/0.6mA

C/SI

Status priority or serial data input

1.0/1.0

20

µA/0.6mA

CP

Clock pulse input (active rising edge)

1.0/1.0

20

µA/0.6mA

SE

Status enable input (active Low)

1.0/1.0

20

µA/0.6mA

M

Compare mode select input

1.0/1.0

20

µA/0.6mA

I/On

3-state parallel data outputs

150/40

3.0mA/24mA

C/SO

Status priority or serial data output

50/33

1.0mA/20mA

LT

Register less than bus output

OC/33

OC/20mA

EQ

Register equal to bus output

OC/33

OC/20mA

GT

Register greater than bus output

OC/33

OC/20mA

NOTE:

One (1.0) FAST Unit Load (U.L.) is defined as 20

µA in the High state and 0.6mA in the Low state.

OC=Open Collector