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VIPER115LSTR Datasheet(PDF) 22 Page - STMicroelectronics

Part # VIPER115LSTR
Description  Energy saving offline high voltage converter
PDF  37 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

VIPER115LSTR Datasheet(HTML) 22 Page - STMicroelectronics

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General description
VIPer11
22/37
DS11873 Rev 5
5.11
Overload protection
To manage the overload condition, the IC embeds the following main blocks: the OCP
comparator to turn off the power MOSFET when the drain current reaches its limit (IDLIM) ,
the up and down OCP counter to define the turn-off delay time in case of continuous
overload (tOVL = 50 ms typ.) and the timer to define the restart time after protection tripping
(tRESTART = 1 s typ.).
In case of short-circuit or overload, the control level on the inverting input of the PWM
comparator is greater than the reference level fed into the inverting input of the OCP
comparator. As a result, the cycle-by-cycle turn-off of the power switch is triggered by the
OCP comparator instead of PWM comparator. Every cycle where this condition is met, the
OCP counter is incremented. If the fault condition lasts longer than tOVL (corresponding to
the counter end-of-count), the protection is tripped, the PWM is disabled for tRESTART, then it
resumes switching with soft-start and, if the fault is still present, it is disabled again after
tOVL. If the converter is definitively operated at FOSC_MIN, (see Section 5.7: Pulse-skipping),
the IC is turned off after the time tOVL_MAX (100 ms or 200 ms or 400 ms typ., depending on
FOSC) and then automatically restarted with soft-start phase, after tRESTART.
The OLP management prevents IC from operating indefinitely at IDLIM and the low repetition
rate of the restart attempts of the converter avoids IC overheating in case of repeated fault
events.
After the fault removal, the IC resumes working normally. If the fault is removed earlier than
the protection tripping (before tOVL), the tOVL-counter is decremented on a cycle-by-cycle
basis down to zero and the protection is not tripped. If the fault is removed during tRESTART,
the IC waits for the tRESTART period has elapsed before resuming switching.
In fault condition the VCC ranges between VCSon and VCCon levels, due to the periodical
activation of the HV current source recharging the VCC capacitor.
Figure 30. Short-circuit condition



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